公开(公告)号：US20210074943A1

公开(公告)日：2021-03-11

申请号：US17082379

申请日：2020-10-28

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： JAYBUM KIM ,  EOKSU KIM ,  KYOUNGSEOK SON ,  JUNHYUNG LIM ,  JIHUN LIM

IPC: H01L51/52 ,  G09G3/3233 ,  H01L27/11 ,  H01L27/32 ,  H01L51/00 ,  G09G3/32

Abstract: A display device includes a base substrate, a first transistor, a second transistor, an organic light emitting diode, and a capacitor electrically connected to the first thin film transistor. The first transistor includes a first semiconductor pattern below a first interlayer insulation layer and a first control electrode above the first interlayer insulation layer and below a second interlayer insulation layer. The second transistor includes a second control electrode above the first interlayer insulation layer and below the second interlayer insulation layer. A second semiconductor pattern is above the second interlayer insulation layer.

公开(公告)号：US20190326543A1

公开(公告)日：2019-10-24

申请号：US16459060

申请日：2019-07-01

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： JAYBUM KIM ,  EOKSU KIM ,  KYOUNGSEOK SON ,  JUNHYUNG LIM ,  JIHUN LIM

IPC: H01L51/52 ,  G09G3/3233 ,  H01L51/00 ,  G09G3/32 ,  H01L27/11 ,  H01L27/32

Abstract: A display device includes a base substrate, a first transistor, a second transistor, an organic light emitting diode, and a capacitor electrically connected to the first thin film transistor, The first transistor includes a first semiconductor pattern below a first interlayer insulation layer and a first control electrode above the first interlayer insulation layer and below a second interlayer insulation layer. The second transistor includes a second control electrode above the first interlayer insulation layer and below the second interlayer insulation layer. A second semiconductor pattern is above the second interlayer insulation layer.

公开(公告)号：US20240224591A1

公开(公告)日：2024-07-04

申请号：US18369928

申请日：2023-09-19

Applicant: Samsung Display Co., LTD.

Inventor： MYEONGHO KIM ,  Youngoo KIM ,  JAYBUM KIM ,  KYOUNG SEOK SON ,  SEUNGHUN LEE

IPC: H10K59/121

CPC classification number: H10K59/1213 ,  H10K59/1216

Abstract: A display panel includes a light-emitting element, and a pixel circuit electrically connected to the light-emitting element. The pixel circuit includes a first transistor including a first semiconductor pattern including a first channel region, and a first gate electrode disposed on the first semiconductor pattern and overlapping the first channel region, a first insulation layer disposed between the first semiconductor pattern and the first gate electrode and overlapping the first channel region, a second insulation layer disposed on the first gate electrode and covering the first transistor, a second transistor disposed on the second insulation layer, and including a second semiconductor pattern including a second channel region, and a second gate electrode disposed on the second semiconductor pattern and overlapping the second channel region, and a third insulation layer disposed between the second semiconductor pattern and the second gate electrode and overlapping the first transistor in a plan view.

公开(公告)号：US20220173191A1

公开(公告)日：2022-06-02

申请号：US17494892

申请日：2021-10-06

Applicant: Samsung Display Co., Ltd.

Inventor： MYEONGHO KIM ,  YEONHONG KIM ,  JAYBUM KIM ,  KYOUNG SEOK SON ,  SUNHEE LEE ,  SEUNGJUN LEE ,  SEUNGHUN LEE ,  JUN HYUNG LIM

IPC: H01L27/32 ,  H01L51/56

Abstract: A display device includes a first lower electrode disposed on a base substrate, a first upper electrode disposed on the first lower electrode, overlapping the first lower electrode in a plan view, including a silicon semiconductor, and constituting a first capacitor together with the first lower electrode, a second lower electrode disposed on the first upper electrode, and a second upper electrode disposed on the second lower electrode, overlapping the second lower electrode in a plan view, including an oxide semiconductor, and constituting a second capacitor together with the second lower electrode.

公开(公告)号：US20220123075A1

公开(公告)日：2022-04-21

申请号：US17358518

申请日：2021-06-25

Applicant: Samsung Display Co., Ltd.

Inventor： EUN HYUN KIM ,  JAYBUM KIM ,  KYOUNG SEOK SON ,  SUNHEE LEE ,  JUN HYUNG LIM

IPC: H01L27/32 ,  H01L51/52 ,  G06F1/16

Abstract: A display device includes a display area and a functional area defining a through-portion therein. At least a portion of the functional area is surrounded by the display area. The display device includes an insulation layer disposed on a base substrate and defining a disconnection portion in the functional area, a pixel array disposed on the base substrate in the display area, and a mask pattern including a metal oxide and extending along the disconnection portion in a plan view.

公开(公告)号：US20200227668A1

公开(公告)日：2020-07-16

申请号：US16836005

申请日：2020-03-31

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： JAYBUM KIM ,  EOKSU KIM ,  KYOUNGSEOK SON ,  JUNHYUNG LIM ,  JIHUN LIM

IPC: H01L51/52 ,  H01L51/00 ,  H01L27/11 ,  G09G3/32 ,  G09G3/3233 ,  H01L27/32

Abstract: A display device includes a base substrate, a first transistor, a second transistor, an organic light emitting diode, and a capacitor electrically connected to the first thin film transistor. The first transistor includes a first semiconductor pattern below a first interlayer insulation layer and a first control electrode above the first interlayer insulation layer and below a second interlayer insulation layer. The second transistor includes a second control electrode above the first interlayer insulation layer and below the second interlayer insulation layer. A second semiconductor pattern is above the second interlayer insulation layer.

公开(公告)号：US20200219953A1

公开(公告)日：2020-07-09

申请号：US16820102

申请日：2020-03-16

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： KYOUNGSEOK SON ,  JAYBUM KIM ,  EOKSU KIM ,  JUNHYUNG LIM ,  JIHUN LIM

IPC: H01L27/32 ,  H01L21/02 ,  H01L21/4757 ,  H01L29/66 ,  H01L29/786

Abstract: A method of manufacturing a semiconductor device. A pre first semiconductor pattern having a crystalline semiconductor material is formed on a base substrate. A pre first insulation layer is formed on the pre first semiconductor pattern. A first semiconductor pattern is formed by defining a channel region in the pre first semiconductor pattern. A pre protection layer is formed on the pre first insulation layer. A pre second semiconductor pattern including an oxide semiconductor material is formed on the pre protection layer. A pre second insulation layer is formed on the pre second semiconductor pattern. The pre second insulation layer is patterned using an etching gas such that at least a portion of the pre second semiconductor pattern is exposed. A second semiconductor pattern is formed by defining a channel region in the pre second semiconductor pattern. The pre protection layer has a material with a first etch selectivity that is different from a second etch selectivity of the second insulation layer with respect to the etching gas.