公开(公告)号：US20240221652A1

公开(公告)日：2024-07-04

申请号：US18482453

申请日：2023-10-06

Applicant: Samsung Display Co., Ltd.

Inventor： KYOUNG SEOK SON ,  MYEONGHO KIM ,  YOUNGOO KIM ,  JAYBUM KIM ,  SEUNGHUN LEE

IPC: G09G3/3233 ,  H10K59/121 ,  H10K59/123

CPC classification number: G09G3/3233 ,  H10K59/1213 ,  H10K59/123 ,  G09G2320/0233

Abstract: Provided is a display panel including a light-emitting element, and a pixel circuit electrically connected to the light-emitting element, and including a driving unit electrically connected to the light-emitting element, the driving unit including a first transistor including a first bottom electrode for receiving a first voltage, and a first semiconductor pattern including an oxide semiconductor above the first bottom electrode, and at least one diode including a second bottom electrode for receiving a second voltage at a same layer as the first bottom electrode, and a second semiconductor pattern above the second bottom electrode, at a same layer as the first semiconductor pattern, including an oxide semiconductor, and integrated with the first semiconductor pattern.

公开(公告)号：US20240114734A1

公开(公告)日：2024-04-04

申请号：US18234778

申请日：2023-08-16

Applicant: Samsung Display Co., LTD.

Inventor： JAYBUM KIM ,  MYEONGHO KIM ,  Youngoo KIM ,  KYOUNG SEOK SON ,  SUNGHOON YANG ,  SUNHEE LEE ,  SEUNGHUN LEE

IPC: H10K59/131 ,  H10K59/124

CPC classification number: H10K59/131 ,  H10K59/124

Abstract: A display device includes a first pixel and a second pixel. The light emitting element of the second pixel and the driving circuit are disposed in the second area. The first pixel includes a silicon transistor and an oxide transistor disposed in the second area. The first pixel includes a first sub-light emitting element and a second sub-light emitting element disposed in a first area, and a first sub-pixel circuit and a second sub-pixel circuit disposed in a second area. A first connection wiring connecting a transistor included in the first sub-pixel circuit and the first sub-light emitting element, and a second connection wiring connecting a transistor included in the second sub-pixel circuit and the second sub-light emitting element are disposed on different layers and include a transparent conductive oxide.

公开(公告)号：US20210074944A1

公开(公告)日：2021-03-11

申请号：US17082459

申请日：2020-10-28

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： JAYBUM KIM ,  EOKSU KIM ,  KYOUNGSEOK SON ,  JUNHYUNG LIM ,  JIHUN LIM

IPC: H01L51/52 ,  G09G3/3233 ,  H01L27/11 ,  H01L27/32 ,  H01L51/00 ,  G09G3/32

Abstract: A display device includes a base substrate, a first transistor, a second transistor, an organic light emitting diode, and a capacitor electrically connected to the first thin film transistor. The first transistor includes a first semiconductor pattern below a first interlayer insulation layer and a first control electrode above the first interlayer insulation layer and below a second interlayer insulation layer. The second transistor includes a second control electrode above the first interlayer insulation layer and below the second interlayer insulation layer. A second semiconductor pattern is above the second interlayer insulation layer.

公开(公告)号：US20200328369A1

公开(公告)日：2020-10-15

申请号：US16911525

申请日：2020-06-25

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： JAYBUM KIM ,  EOKSU KIM ,  KYOUNGSEOK SON ,  JUNHYUNG LIM ,  JIHUN LIM

IPC: H01L51/52 ,  G09G3/3233 ,  G09G3/32 ,  H01L51/00 ,  H01L27/11 ,  H01L27/32

Abstract: A display device includes a base substrate, a first transistor, a second transistor, an organic light emitting diode, and a capacitor electrically connected to the first thin film transistor. The first transistor includes a first semiconductor pattern below a first interlayer insulation layer and a first control electrode above the first interlayer insulation layer and below a second interlayer insulation layer. The second transistor includes a second control electrode above the first interlayer insulation layer and below the second interlayer insulation layer. A second semiconductor pattern is above the second interlayer insulation layer.

公开(公告)号：US20200219991A1

公开(公告)日：2020-07-09

申请号：US16824339

申请日：2020-03-19

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： JAYBUM KIM ,  SERYEONG KIM ,  JUNHYUNG LIM ,  TAESANG KIM

IPC: H01L29/66 ,  H01L27/12 ,  H01L27/32 ,  H01L29/04 ,  H01L27/146 ,  H01L29/786

Abstract: A semiconductor device includes a base substrate. A first thin-film transistor is disposed on the base substrate. The first thin-film transistor includes a first input electrode, a first output electrode, a first semiconductor pattern disposed below a first insulating layer, and a first control electrode disposed on the first insulating layer and below a second insulating layer. A second thin-film transistor includes a second input electrode, a second output electrode, a second semiconductor pattern disposed on the second insulating layer, and a second control electrode disposed on an insulating pattern formed on the second semiconductor pattern and exposes a portion of the second semiconductor pattern. The first semiconductor pattern includes a crystalline semiconductor. The second semiconductor pattern includes an oxide semiconductor. The first semiconductor pattern, the first control electrode, the second semiconductor pattern, and the second control electrode are overlapped.

公开(公告)号：US20180069190A1

公开(公告)日：2018-03-08

申请号：US15657369

申请日：2017-07-24

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： JAYBUM KIM ,  EOKSU KIM ,  KYOUNGSEOK SON ,  JUNHYUNG LIM ,  JIHUN LIM

IPC: H01L51/52 ,  H01L51/00 ,  H01L27/11

CPC classification number: H01L51/5203 ,  G09G3/32 ,  G09G3/3233 ,  G09G2300/0426 ,  G09G2300/0814 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2300/0866 ,  G09G2310/0245 ,  G09G2310/0262 ,  H01L27/1108 ,  H01L27/3262 ,  H01L27/3265 ,  H01L51/0023 ,  H01L51/0096 ,  H01L51/5296 ,  H01L2227/323

Abstract: A display device includes a base substrate, a first transistor, a second transistor, an organic light emitting diode, and a capacitor electrically connected to the first thin film transistor. The first transistor includes a first semiconductor pattern below a first interlayer insulation layer and a first control electrode above the first interlayer insulation layer and below a second interlayer insulation layer. The second transistor includes a second control electrode above the first interlayer insulation layer and below the second interlayer insulation layer. A second semiconductor pattern is above the second interlayer insulation layer.

公开(公告)号：US20180061920A1

公开(公告)日：2018-03-01

申请号：US15683121

申请日：2017-08-22

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： KYOUNGSEOK SON ,  JAYBUM KIM ,  EOKSU KIM ,  JUNHYUNG LIM ,  JIHUN LIM

IPC: H01L27/32 ,  H01L29/786 ,  H01L29/66 ,  H01L21/4757 ,  H01L21/02

CPC classification number: H01L27/3262 ,  H01L21/02164 ,  H01L21/02178 ,  H01L21/47573 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/1248 ,  H01L27/1255 ,  H01L27/1262 ,  H01L27/127 ,  H01L27/3258 ,  H01L27/3265 ,  H01L28/60 ,  H01L29/24 ,  H01L29/66757 ,  H01L29/66969 ,  H01L29/78675 ,  H01L29/7869 ,  H01L2227/323

Abstract: A method of manufacturing a semiconductor device. A pre first semiconductor pattern having a crystalline semiconductor material is formed on a base substrate. A pre first insulation layer is formed on the pre first semiconductor pattern. A first semiconductor pattern is formed by defining a channel region in the pre first semiconductor pattern. A pre protection layer is formed on the pre first insulation layer. A pre second semiconductor pattern including an oxide semiconductor material is formed on the pre protection layer. A pre second insulation layer is formed on the pre second semiconductor pattern. The pre second insulation layer is patterned using an etching gas such that at least a portion of the pre second semiconductor pattern is exposed. A second semiconductor pattern is formed by defining a channel region in the pre second semiconductor pattern. The pre protection layer has a material with a first etch selectivity that is different from a second etch selectivity of the second insulation layer with respect to the etching gas.

公开(公告)号：US20240260319A1

公开(公告)日：2024-08-01

申请号：US18634558

申请日：2024-04-12

Applicant: Samsung Display Co., Ltd.

Inventor： MYEONGHO KIM ,  YEONHONG KIM ,  JAYBUM KIM ,  KYOUNG SEOK SON ,  SUNHEE LEE ,  SEUNGJUN LEE ,  SEUNGHUN LEE ,  JUN HYUNG LIM

IPC: H10K59/121 ,  H10K59/12 ,  H10K71/00

CPC classification number: H10K59/1216 ,  H10K59/1213 ,  H10K71/00 ,  H10K59/1201

Abstract: A display device includes a first lower electrode disposed on a base substrate, a first upper electrode disposed on the first lower electrode, overlapping the first lower electrode in a plan view, including a silicon semiconductor, and constituting a first capacitor together with the first lower electrode, a second lower electrode disposed on the first upper electrode, and a second upper electrode disposed on the second lower electrode, overlapping the second lower electrode in a plan view, including an oxide semiconductor, and constituting a second capacitor together with the second lower electrode.

公开(公告)号：US20230056897A1

公开(公告)日：2023-02-23

申请号：US17841904

申请日：2022-06-16

Applicant: Samsung Display Co., Ltd.

Inventor： MYEONGHO KIM ,  JAYBUM KIM ,  KYOUNG SEOK SON ,  SEUNGJUN LEE ,  SEUNGHUN LEE ,  JUN HYUNG LIM

IPC: H01L27/12

Abstract: A display device includes a first semiconductor layer, a first conductive layer disposed on the first semiconductor layer and including a first capacitor electrode at least partially overlapping the first semiconductor layer in a plan view to constitute a first transistor, a second capacitor electrode disposed on the first conductive layer and overlapping the first capacitor electrode in a plan view to constitute a first capacitor, a second semiconductor layer disposed on the second capacitor electrode and including a third capacitor electrode overlapping the second capacitor electrode in a plan view to constitute a second capacitor, a second conductive layer disposed on the second semiconductor layer and at least partially overlapping the second semiconductor layer, and a third conductive layer disposed over the second conductive layer to implement a high-resolution image by overlapping the first capacitor electrode, the second capacitor electrode, and the third capacitor electrode.

公开(公告)号：US20220181465A1

公开(公告)日：2022-06-09

申请号：US17652843

申请日：2022-02-28

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： JAYBUM KIM ,  SERYEONG KIM ,  JUNHYUNG LIM ,  TAESANG KIM

IPC: H01L29/66 ,  H01L27/32 ,  H01L29/786 ,  H01L27/146 ,  H01L29/04 ,  H01L27/12

Abstract: A semiconductor device includes a base substrate. A first thin-film transistor is disposed on the base substrate. The first thin-film transistor includes a first input electrode, a first output electrode, a first semiconductor pattern disposed below a first insulating layer, and a first control electrode disposed on the first insulating layer and below a second insulating layer. A second thin-film transistor includes a second input electrode, a second output electrode, a second semiconductor pattern disposed on the second insulating layer, and a second control electrode disposed on an insulating pattern formed on the second semiconductor pattern and exposes a portion of the second semiconductor pattern. The first semiconductor pattern includes a crystalline semiconductor. The second semiconductor pattern incudes an oxide semiconductor. The first semiconductor pattern, the first control electrode, the second semiconductor pattern, and the second control electrode are overlapped.