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    GATE DRIVER AND DISPLAY DEVICE INCLUDING THE SAME
    11.
    发明申请
    GATE DRIVER AND DISPLAY DEVICE INCLUDING THE SAME 有权
    闸门驱动器和显示装置，包括它们

    公开(公告)号：US20150263722A1

    公开(公告)日：2015-09-17

    申请号：US14334104

    申请日：2014-07-17

    Applicant: Samsung Display Co. Ltd.

    Inventor： Jong Hee KIM ,  Hyun Joon KIM ,  Cheol Gon LEE ,  Jae Keun LIM ,  Chong Chul CHAI

    IPC: H03K17/16 ,  G09G3/32 ,  H03K17/00 ,  H03K17/687

    CPC classification number: H03K17/162 ,  G09G3/3266 ,  G09G2310/0286 ,  G09G2320/045 ,  H03K17/002 ,  H03K17/6871

    Abstract: A gate driver includes a plurality of stages connected to each other in a cascade manner, where each of the stages includes an input unit which connects a first input terminal and a first node and includes a first input transistor and a second input transistor, where an output terminal of the first input transistor and an input terminal of the second input transistor are connected to a second node, and the input unit further includes a storage capacitor which connects the first input terminal and the second node.

    Abstract translation: 栅极驱动器包括以级联方式彼此连接的多个级，其中每个级包括连接第一输入端和第一节点的输入单元，并且包括第一输入晶体管和第二输入晶体管，其中 第一输入晶体管的输出端子和第二输入晶体管的输入端子连接到第二节点，并且输入单元还包括连接第一输入端子和第二节点的存储电容器。

    SUB-PIXEL AND DISPLAY DEVICE INCLUDING THE SAME
    12.
    发明申请
    SUB-PIXEL AND DISPLAY DEVICE INCLUDING THE SAME 有权

    公开(公告)号：US20250118254A1

    公开(公告)日：2025-04-10

    申请号：US18744921

    申请日：2024-06-17

    Applicant: Samsung Display Co., Ltd.

    Inventor： Jae Keun LIM ,  Bon Seog GU ,  Ji Youn KIM ,  Hyun Joon KIM ,  Jin Young ROH ,  Hae Kwan SEO

    IPC: G09G3/3233

    Abstract: A sub-pixel may include a first transistor configured to generate a driving current, a first capacitor including a first electrode connected to a first electrode of the first transistor, and a second electrode, a second capacitor including a first electrode connected to a control electrode of the first transistor, and a second electrode connected to the second electrode of the first capacitor, a second transistor configured to provide a data voltage to the second electrode of the first capacitor in response to a write gate signal, and a light emitting element configured to receive the driving current and emit light.

    DISPLAY DEVICE
    14.
    发明申请
    DISPLAY DEVICE 有权

    公开(公告)号：US20220319435A1

    公开(公告)日：2022-10-06

    申请号：US17519625

    申请日：2021-11-05

    Applicant: Samsung Display Co., Ltd.

    Inventor： Se Hyuk PARK ,  Hong Soo KIM ,  Jin Young ROH ,  Hyo Jin LEE ,  Jae Keun LIM

    IPC: G09G3/3266 ,  G09G3/3275

    Abstract: The present disclosure provides a display device that controls output of a scan signal, conversion of image data, and output of a data signal in response to partial scan driving. The display device includes a display panel driven in one of a first mode and a second mode, a scan driver sequentially supplying a scan signal for writing data in the first mode, a controller generating image data in which input image data is rearranged based on the first mode or the second mode, and a data driver converting the image data into data signals and supplying the data signals to output channels.

    SCAN DRIVER
    15.
    发明申请
    SCAN DRIVER 有权

    公开(公告)号：US20220101774A1

    公开(公告)日：2022-03-31

    申请号：US17320372

    申请日：2021-05-14

    Applicant: SAMSUNG DISPLAY CO., LTD.

    Inventor： Jae Keun LIM ,  Jin Young ROH ,  Se Hyuk PARK ,  Hyo Jin LEE

    IPC: G09G3/20

    Abstract: A scan driver stage including: a first transistor including a gate connected to a first clock, a first electrode connected to a carry terminal, and a second electrode connected to a first node; a second transistor including a gate connected to a second clock, a first electrode connected to a carry terminal, and a second electrode connected to the first node; a third transistor including a gate connected to the first node and a first electrode connected to a second node; a fourth transistor including a gate connected to the second clock, a first electrode connected to power, and a second electrode connected to the second node; a fifth transistor including a gate connected to the first clock, a first electrode connected to power, and a second electrode connected to the second node; and an output outputting first and second scan signals based on first and second node voltages.

    DISPLAY DEVICE WITH FINGERPRINT AREA
    16.
    发明申请
    DISPLAY DEVICE WITH FINGERPRINT AREA 有权

    公开(公告)号：US20210133416A1

    公开(公告)日：2021-05-06

    申请号：US17146923

    申请日：2021-01-12

    Applicant: Samsung Display Co. Ltd.

    Inventor： Jeon Kyoo KIM ,  Jun Yong SONG ,  Jae Keun LIM

    IPC: G06K9/00 ,  G09G3/3233 ,  G06F3/044 ,  G06F21/32 ,  G06F3/041

    Abstract: A display device has a display area with a first area in which a fingerprint is recognized and a second area in which a fingerprint is not recognized, and a non-display area. A fingerprint sensing unit is disposed to overlap with the first area. A first pixel set is disposed to overlap with the first area, and a second pixel set is disposed to overlap with the second area, each set including a plurality of pixels. A first voltage signal is provided to the first pixel set as a variable frequency signal, and includes a first period during which the first voltage signal is a first frequency signal, a second period during which the first voltage signal is a second frequency signal having a lower frequency than the first frequency signal, and a third period during which the first voltage signal is the first frequency signal.

    GATE CIRCUIT, DRIVING METOHD FOR GATE CIRCUIT AND DISPLAY DEVICE USING THE SAME
    18.
    发明申请
    GATE CIRCUIT, DRIVING METOHD FOR GATE CIRCUIT AND DISPLAY DEVICE USING THE SAME 有权
    门电路，用于门电路的驱动电极和使用该电路的显示器件

    公开(公告)号：US20160240129A1

    公开(公告)日：2016-08-18

    申请号：US14920596

    申请日：2015-10-22

    Applicant: Samsung Display Co., Ltd.

    Inventor： Jong Hee KIM ,  Ji-Sun KIM ,  Jun Hyun PARK ,  Young Wan SEO ,  Jae Keun LIM ,  Chong Chul CHAI

    IPC: G09G3/20 ,  H03K19/0175

    CPC classification number: G09G3/2092 ,  G09G2310/0286 ,  H03K19/017509

    Abstract: A gate circuit according to an exemplary embodiment of the present inventive concept comprises a plurality of stages, each receiving a clock signal and outputting a gate signal and a carry signal. One of the plurality of stages includes a first transistor of which a first terminal and a control terminal are connected to each other and a carry signal of a stage before previous stage is input to the first terminal and the control terminal and a second transistor of which a gate signal of the previous stage is input to a first terminal, a control terminal is connected with a second terminal of the first transistor, and an output terminal is connected to a first node.

    Abstract translation: 根据本发明构思的示例性实施例的门电路包括多个级，每个级接收时钟信号并输出​​门信号和进位信号。 多个级中的一个包括第一晶体管和第一晶体管，第一晶体管的第一端子和控制端子彼此连接，并且前一级之前的级的进位信号被输入到第一端子和控制端子，第二晶体管的第二晶体管 前级的门信号被输入到第一端子，控制端子与第一晶体管的第二端子连接，输出端子连接到第一节点。

    GATE CIRCUIT AND DISPLAY DEVICE USING THE SAME
    19.
    发明申请
    GATE CIRCUIT AND DISPLAY DEVICE USING THE SAME 有权
    使用相同的门电路和显示装置

    公开(公告)号：US20150356909A1

    公开(公告)日：2015-12-10

    申请号：US14565553

    申请日：2014-12-10

    Applicant: Samsung Display Co., Ltd.

    Inventor： Jae Keun LIM ,  Hyun Joon KIM ,  Cheol-Gon LEE ,  Chong Chul CHAI

    IPC: G09G3/20 ,  H03K17/16

    CPC classification number: H03K17/162 ,  G09G3/3677 ,  G09G2300/0426 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/08

    Abstract: A gate driver includes a stage including an input unit including a first transistor diode-connected to a first input terminal of the stage through a first node and biased by a first input signal of the first input terminal, an output unit including a second transistor including a gate electrode coupled to the first node, a first electrode coupled to a clock input terminal, and a second electrode coupled to a first output terminal of the stage, a capacitor coupled between the gate electrode and the second electrode of the second transistor, and a noise remover including a third transistor including a gate electrode coupled to a second node, a first electrode coupled to the first node, and a second electrode coupled to a first voltage input terminal of the stage which receives a first voltage.

    Abstract translation: 栅极驱动器包括一个输入单元，该输入单元包括第一晶体二极管，第一晶体二极管通过第一节点连接到该级的第一输入端，并被第一输入端的第一输入信号偏置;输出单元，包括第二晶体管，包括 耦合到第一节点的栅电极，耦合到时钟输入端的第一电极和耦合到该级的第一输出端的第二电极，耦合在第二晶体管的栅电极和第二电极之间的电容器，以及 噪声去除器，包括第三晶体管，其包括耦合到第二节点的栅极电极，耦合到第一节点的第一电极和耦合到接收第一电压的级的第一电压输入端子的第二电极。

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