公开(公告)号：US11854648B2

公开(公告)日：2023-12-26

申请号：US17947301

申请日：2022-09-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chunghyun Ryu ,  Minsung Kil ,  Youngsang Cho

IPC: G11C5/14

CPC classification number: G11C5/148

Abstract: In a method of resetting a storage device, an internal power supply voltage is generated based on an external power supply voltage. A first reset control signal that is activated when a level of the internal power supply voltage is higher than a reference level. A second reset control signal that is activated after a power-on of the storage device is completed or deactivated after a predetermined delay time from when the external power supply voltage is turned off. A final reset control signal is generated based on the first reset control signal and the second reset control signal. The final reset control signal is activated when at least one of the first and second reset control signals is activated. After the external power supply voltage is turned off, a reset operation is performed when the final reset control signal is activated.

公开(公告)号：US11488640B2

公开(公告)日：2022-11-01

申请号：US17346212

申请日：2021-06-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chunghyun Ryu ,  Minsung Kil ,  Youngsang Cho

IPC: G11C5/14

Abstract: In a method of resetting a storage device, an internal power supply voltage is generated based on an external power supply voltage. A first reset control signal that is activated when a level of the internal power supply voltage is higher than a reference level. A second reset control signal that is activated after a power-on of the storage device is completed or deactivated after a predetermined delay time from when the external power supply voltage is turned off. A final reset control signal is generated based on the first reset control signal and the second reset control signal. The final reset control signal is activated when at least one of the first and second reset control signals is activated. After the external power supply voltage is turned off, a reset operation is performed when the final reset control signal is activated.

公开(公告)号：US20210074332A1

公开(公告)日：2021-03-11

申请号：US16877752

申请日：2020-05-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： WOOSUNG LEE ,  Chunghyun Ryu ,  Hyoungtaek Lim

IPC: G11C5/00 ,  G11C5/14

Abstract: A memory system and storage device are provided, including: an auxiliary power device having at least one capacitor, wherein the at least one capacitor has a first path for leakage current; a charging circuit including a switch connected to the auxiliary power device; and a state determining circuit connected to the auxiliary power device, wherein the state determining circuit includes a path circuit connected in parallel with the at least one capacitor to form a second path having at least one of a resistance lower than a resistance of the first path or a current source.