公开(公告)号：US20210373996A1

公开(公告)日：2021-12-02

申请号：US17177415

申请日：2021-02-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Deok Ho Seo ,  Nam Hyung Kim ,  Dae-Jeong Kim ,  Do-Han Kim ,  Min Su Kim ,  Won Jae Shin ,  Yong Jun Yu ,  Chang Min Lee ,  Il Gyu Jung ,  In Su Choi

IPC: G06F11/10 ,  G11C11/406

Abstract: A memory module includes a memory device configured to receive a first refresh command from a host, and perform a refresh operation in response to the first refresh command during a refresh time, and a computing unit configured to detect the first refresh command provided from the host to the memory device, and write a first error pattern at a first address of the memory device during the refresh time.

公开(公告)号：US11516482B2

公开(公告)日：2022-11-29

申请号：US16631347

申请日：2018-07-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Do-Han Kim ,  Jin-Min Bang ,  Chang-Woo Lee

IPC: H04N5/232 ,  H04N19/167 ,  H04N19/17 ,  G06V10/10

Abstract: According to one embodiment of the present invention, an electronic device may comprise a processor and an image sensing module, wherein the image sensing module comprises an image sensor, and a control circuit electrically connected to the image sensor and connected to the processor through an interface, and the control circuit is configured to: acquire at least one raw image, using the image sensor; designate, for the at least one raw image, first data corresponding to a first region and second data not corresponding to the first region, on the basis of information related to the first region in the at least one raw image; transform the at least one raw image by changing at least a part of the second data to a designated value; and compress the at least one transformed raw image and transmit the compressed transformed raw image to the processor.

公开(公告)号：US11144249B2

公开(公告)日：2021-10-12

申请号：US16814281

申请日：2020-03-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung-Woo Lim ,  Kyu-Min Park ,  Do-Han Kim

IPC: G06F3/06 ,  G06F12/10

Abstract: A storage system includes a processor configured to request a write operation of first data corresponding to a first logical address, and requests a write operation of second data corresponding to a second logical address, a memory module including a nonvolatile memory device configured to store the first data and the second data, and a controller configured to convert the first logical address into a first device logical address, and converts the second logical address into a second device logical address based on the first device logical address and a size of the first data, and a storage device configured to store the first data in the storage device based on the first device logical address, and store the second data in the storage device based on the second device logical address.

公开(公告)号：US10884655B2

公开(公告)日：2021-01-05

申请号：US16386645

申请日：2019-04-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minsu Kim ,  Tae-Kyeong Ko ,  Dae-Jeong Kim ,  Do-Han Kim ,  Sung-Joon Kim ,  Wonjae Shin ,  Kwanghee Lee ,  Changmin Lee ,  Insu Choi

IPC: G06F3/06 ,  G06F12/0891 ,  G06F12/1009 ,  G06F12/02

Abstract: A storage module includes a dynamic random access memory (DRAM) device, a nonvolatile memory device, and a high-speed buffer memory. An method of operating the storage module includes copying target data stored in the nonvolatile memory device to the high-speed buffer memory in response to an external device entering a page fault mode, receiving a first refresh command from the external device, and, in response to the first refresh command, performing a first refresh operation associated with the DRAM device and moving the target data copied to the high-speed buffer memory to the DRAM device during a first refresh reference time.