公开(公告)号：US20130146961A1

公开(公告)日：2013-06-13

申请号：US13765213

申请日：2013-02-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chanjin Park ,  Kihyun Hwang ,  Dongchul Yoo ,  Junkyu Yang ,  Gyungjin Min ,  Yoochul Kong ,  Hanmei Choi

IPC: H01L29/788 ,  H01L29/792 ,  H01L23/538

CPC classification number: H01L29/788 ,  H01L23/5384 ,  H01L27/11551 ,  H01L27/11556 ,  H01L27/11578 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7889 ,  H01L29/792 ,  H01L29/7926 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Provided is a three dimensional semiconductor device. The device may include mold layers vertically and sequentially stacked, a conductive pattern between the stacked mold layers, a plugging pattern vertically penetrating the stacked mold layers, an intermediate pattern between the conductive pattern and the plugging pattern, and protective layer patterns between the mold layers and the plugging pattern, wherein the protective layer patterns are separated by the intermediate pattern.

Abstract translation: 提供三维半导体器件。 该装置可以包括垂直和顺序堆叠的模具层，堆叠的模具层之间的导电图案，垂直穿过堆叠的模具层的插入图案，导电图案和插入图案之间的中间图案，以及模具层之间的保护层图案 和封堵图案，其中保护层图案由中间图案分离。