Memory device and memory system including the same

    公开(公告)号:US10403332B2

    公开(公告)日:2019-09-03

    申请号:US15792973

    申请日:2017-10-25

    Abstract: Provided are a memory device and a memory system including the same. The memory device may include a first memory rank including at least one first memory chip, a memory controller configured to provide a command to the first memory rank, at least one data buffer configured to buffer data input to the at least one first memory chip or being output from the at least one first memory chip, and a second memory rank connected to the first memory rank and comprising at least one second memory chip. The first memory rank may provide training data and a data strobe signal to the second memory rank based on a data training command from the memory controller without the training data and the data strobe signal passing through the data buffer. The second memory rank may determine a delay of the data strobe signal based on the training data being detected by the second memory rank.

    Nonvolatile memory module and storage system having the same

    公开(公告)号:US10048878B2

    公开(公告)日:2018-08-14

    申请号:US15132466

    申请日:2016-04-19

    Abstract: The nonvolatile memory module includes at least one nonvolatile memory, and a device controller including a RAM to store data exchanged between a host and the at least one nonvolatile memory and a DIMM controller to control data exchange between the RAM and the at least one nonvolatile memory. An allocation for an access area at an access to the RAM is performed during a write transaction in which data is recorded at the RAM and is released during a read transaction of the recorded data.

    Storage device
    15.
    发明授权

    公开(公告)号:US09916897B2

    公开(公告)日:2018-03-13

    申请号:US15055779

    申请日:2016-02-29

    CPC classification number: G11C16/00 G06F11/00

    Abstract: A storage device includes nonvolatile memories and a device controller configured to store data being received from an external device in an internal RAM, according to a command and an address being received from the external device. The device controller controls the nonvolatile memories according to the data stored in the internal RAM, distinguishes whether phase bits received with the data and also stored in the internal RAM are valid, and processes the data stored in the internal RAM when the phase bits are valid.

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