REFERENCE VOLTAGE TRAINING DEVICE AND METHOD THEREOF
    11.
    发明申请
    REFERENCE VOLTAGE TRAINING DEVICE AND METHOD THEREOF 有权
    参考电压训练装置及其方法

    公开(公告)号:US20160197611A1

    公开(公告)日:2016-07-07

    申请号:US14976716

    申请日:2015-12-21

    Abstract: Provided are a reference voltage training device and a method thereof. The reference voltage training device includes a comparator configured to compare a toggle signal with a reference voltage and output a comparison signal, a duty cycle detector configured to check a duty ratio of the comparison signal, and a reference voltage level changing unit configured to fix the reference voltage when the duty ratio meets a predetermined condition and to change a level of the reference voltage when the duty ratio does not meet the predetermined condition. The comparator outputs a changed comparison signal using the changed reference voltage.

    Abstract translation: 提供了一种参考电压训练装置及其方法。 参考电压训练装置包括:比较器,被配置为将触发信号与参考电压进行比较并输出比较信号;配置为检查比较信号的占空比的占空比检测器;以及参考电压电平改变单元, 当占空比满足预定条件时的参考电压,并且当占空比不满足预定条件时改变参考电压的电平。 比较器使用改变的参考电压输出改变的比较信号。

    COMMAND CONTROL CIRCUIT FOR MEMORY DEVICE AND MEMORY DEVICE INCLUDING THE SAME
    12.
    发明申请
    COMMAND CONTROL CIRCUIT FOR MEMORY DEVICE AND MEMORY DEVICE INCLUDING THE SAME 审中-公开
    用于存储器件的指令控制电路和包括其的存储器件

    公开(公告)号:US20140181567A1

    公开(公告)日:2014-06-26

    申请号:US14097689

    申请日:2013-12-05

    Abstract: Exemplary embodiments disclose a command control circuit including a command decoder configured to generate an internal command signal using a chip select (CS) signal and a command signal, and a CS gating logic configured to provide the CS signal to the command decoder, wherein the CS gating logic is further configured to provide the CS signal to the command decoder in response to a clock enable (CKE) signal being at a first level, and block the CS signal from the command decoder in response to the CKE signal being at a second level.

    Abstract translation: 示例性实施例公开了一种命令控制电路,其包括命令解码器,其被配置为使用片选(CS)信号和命令信号产生内部命令信号,以及CS门控逻辑,其被配置为向命令解码器提供CS信号,其中CS 门控逻辑还被配置为响应于处于第一电平的时钟使能(CKE)信号而将CS信号提供给命令解码器,并且响应于CKE信号处于第二电平来阻止来自命令解码器的CS信号 。

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