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    Pseudo main memory system
    12.
    发明授权
    Pseudo main memory system 有权

    公开(公告)号：US11030088B2

    公开(公告)日：2021-06-08

    申请号：US16600313

    申请日：2019-10-11

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Krishna T. Malladi ,  Jongmin Gim ,  Hongzhong Zheng

    IPC: G06F12/02 ,  G06F13/16 ,  G06F12/121

    Abstract: A pseudo main memory system. The system includes a memory adapter circuit for performing memory augmentation using compression, deduplication, and/or error correction. The memory adapter circuit is connected to a memory, and employs the memory augmentation methods to increase the effective storage capacity of the memory. The memory adapter circuit is also connected to a memory bus and implements an NVDIMM-F or modified NVDIMM-F interface for connecting to the memory bus.

    DATABASE OFFLOADING ENGINE
    13.
    发明申请
    DATABASE OFFLOADING ENGINE 审中-公开

    公开(公告)号：US20200097210A1

    公开(公告)日：2020-03-26

    申请号：US16195732

    申请日：2018-11-19

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Andrew Zhenwen Chang ,  Jongmin Gim ,  Hongzhong Zheng

    IPC: G06F3/06 ,  G06F21/62

    Abstract: A database offloading engine. In some embodiments, the database offloading engine includes a vectorized adder including a plurality of read-modify-write circuits, a plurality of sum buffers respectively connected to the read-modify-write circuits, a key address table, and a control circuit. The control circuit may be configured to receive a first key and a corresponding first value; to search the key address table for the first key; and, in response to finding, in the key address table, an address corresponding to the first key, to route the address and the first value to a read-modify-write circuit, of the plurality of read-modify-write circuits, corresponding to the address.

    Overflow region memory management
    15.
    发明授权
    Overflow region memory management 有权

    公开(公告)号：US10268413B2

    公开(公告)日：2019-04-23

    申请号：US15473311

    申请日：2017-03-29

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Dongyan Jiang ,  Changhui Lin ,  Krishna Malladi ,  Jongmin Gim ,  Hongzhong Zheng

    IPC: G06F12/00 ,  G06F3/06 ,  G06F12/10 ,  G06F13/16 ,  G06F13/42

    Abstract: A memory module includes a host interface configured to provide an interface to a host computer; one or more memory devices; a deduplication engine configured to provide a virtual memory capacity of the memory module that is larger than a physical size of the one or more memory devices; a memory controller for controlling access to the one or more memory devices; a volatile memory comprising a hash table, an overflow memory region, and a credit unit, wherein the overflow memory region stores user data when a hash collision occurs or the hash table is full, and wherein the credit unit stores an address of an invalidated entry in the overflow memory region; and a control logic is configured to control the overflow memory region and the credit unit and generate a warning indicating a status of the overflow memory region and the credit unit.

    METHOD AND APPARATUS FOR ENABLING LARGER MEMORY CAPACITY THAN PHYSICAL MEMORY SIZE
    16.
    发明申请
    METHOD AND APPARATUS FOR ENABLING LARGER MEMORY CAPACITY THAN PHYSICAL MEMORY SIZE 审中-公开

    公开(公告)号：US20170286313A1

    公开(公告)日：2017-10-05

    申请号：US15476757

    申请日：2017-03-31

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Dongyan Jiang ,  Changhui Lin ,  Krishna Malladi ,  Jongmin Gim ,  Hongzhong Zheng

    IPC: G06F12/1018 ,  G06F12/0864 ,  G06F3/06

    Abstract: A method of retrieving data stored in a memory associated with a dedupe module is provided. The method includes: identifying a logical address of the data; identifying a physical line ID of the data in accordance with the logical address by looking up at least a portion of the logical address in a translation table; locating a respective physical line, the respective physical line corresponding to the PLID; and retrieving the data from the respective physical line, the retrieving including copying a respective hash cylinder to the read cache, the respective hash cylinder including: a respective hash bucket, the respective hash bucket including the respective physical line; and a respective reference counter bucket, the respective reference counter bucket including a respective reference counter associated with the respective physical line.

    Systems, methods, and apparatus for selecting devices in tiered memory
    17.
    发明授权
    Systems, methods, and apparatus for selecting devices in tiered memory 有权

    公开(公告)号：US12093540B2

    公开(公告)日：2024-09-17

    申请号：US17840587

    申请日：2022-06-14

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jongmin Gim ,  Yang Seok Ki

    IPC: G06F3/06

    CPC classification number: G06F3/0631 ,  G06F3/0604 ,  G06F3/0679

    Abstract: A method may include receiving a request for a memory page in a memory tier comprising a first memory device and a second memory device, wherein the first memory device has a first parameter and the second memory device has a second parameter, selecting, based on the first parameter and the second parameter, the first memory device, and allocating, based on the request, based on the selecting, the memory page from the first memory device. The selecting may include determining a first result based on the first parameter, determining a second result based on the second parameter, and comparing the first result and the second result. The determining the first result may include combining the first parameter with a first weight. The first weight may include a first scale factor, and the combining the first parameter with the first weight may include multiplying the first parameter and the first scale factor.

    Systems and methods for expandable memory error handling
    18.
    发明授权
    Systems and methods for expandable memory error handling 有权

    公开(公告)号：US12019503B2

    公开(公告)日：2024-06-25

    申请号：US17845679

    申请日：2022-06-21

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jongmin Gim ,  Yang Seok Ki

    IPC: G06F11/07

    CPC classification number: G06F11/0787 ,  G06F11/073

    Abstract: A system for handling faulty pages includes: a host processor; host memory connected to the host processor over a first memory interface; and an expandable memory pool connected to the host processor over a second memory interface different from the first memory interface. The host memory includes instructions that, when executed by the host processor, cause the host processor to: detect an error in a target page of a first memory device of the expandable memory pool; generate an interrupt in response to detecting the error; store in a faulty page log, faulty page information corresponding to the target page of the first memory device; and change a status of the target page of the first memory device from a first state to a second state according to the faulty page log.

    SYSTEMS AND METHODS FOR EXPANDABLE MEMORY ERROR HANDLING
    19.
    发明公开
    SYSTEMS AND METHODS FOR EXPANDABLE MEMORY ERROR HANDLING 审中-公开

    公开(公告)号：US20230401120A1

    公开(公告)日：2023-12-14

    申请号：US17845679

    申请日：2022-06-21

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jongmin Gim ,  Yang Seok Ki

    IPC: G06F11/07 ,  G06F12/0882 ,  G06F9/50 ,  G06F9/54

    CPC classification number: G06F11/0787 ,  G06F12/0882 ,  G06F2209/5011 ,  G06F9/545 ,  G06F9/5016

    Abstract: A system for handling faulty pages, including: a host processor; host memory connected to the host processor over a first memory interface; and an expandable memory pool connected to the host processor over a second memory interface different from the first memory interface, the host memory including instructions that, when executed by the host processor, cause the host processor to: detect an error in a target page of a first memory device of the expandable memory pool; generate an interrupt in response to detecting the error; store in a faulty page log, faulty page information corresponding to the target page of the first memory device; and change a status of the target page of the first memory device from a first state to a second state according to the faulty page log.

    Method and apparatus for enabling larger memory capacity than physical memory size
    20.
    发明授权
    Method and apparatus for enabling larger memory capacity than physical memory size 有权

    公开(公告)号：US10678704B2

    公开(公告)日：2020-06-09

    申请号：US15476757

    申请日：2017-03-31

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Dongyan Jiang ,  Changhui Lin ,  Krishna Malladi ,  Jongmin Gim ,  Hongzhong Zheng

    IPC: G06F12/1018 ,  G06F3/06 ,  G06F12/0864

    Abstract: A method of retrieving data stored in a memory associated with a dedupe module is provided. The method includes: identifying a logical address of the data; identifying a physical line ID of the data in accordance with the logical address by looking up at least a portion of the logical address in a translation table; locating a respective physical line, the respective physical line corresponding to the PLID; and retrieving the data from the respective physical line, the retrieving including copying a respective hash cylinder to the read cache, the respective hash cylinder including: a respective hash bucket, the respective hash bucket including the respective physical line; and a respective reference counter bucket, the respective reference counter bucket including a respective reference counter associated with the respective physical line.

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