公开(公告)号：US20180358293A1

公开(公告)日：2018-12-13

申请号：US15868379

申请日：2018-01-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seul Ki HONG ,  Heon Jong Shin ,  Hwi Chan Jun ,  Min Chan Gwak

IPC: H01L23/522 ,  H01L29/78 ,  H01L27/088 ,  H01L29/06 ,  H01L23/535 ,  H01L23/532

CPC classification number: H01L23/5226 ,  H01L21/32115 ,  H01L21/32137 ,  H01L23/485 ,  H01L23/53257 ,  H01L23/53261 ,  H01L23/53295 ,  H01L23/535 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/66545 ,  H01L29/7851

Abstract: A semiconductor device includes a substrate having a device isolation region defining an active region. An active fin is positioned in the active region. A gate structure overlaps the active fin along a direction orthogonal to an upper surface of the substrate and extends in a second direction intersecting the first direction, A source/drain region is disposed on the active fin. A contact plug is connected to the source/drain region and overlaps the active fin. A metal via is positioned at a first level above the substrate higher than an upper surface of the contact plug and spaced apart from the active fin. A metal line is positioned at a second level above the substrate, higher than the first level and connected to the metal via. A via connection layer extends from an upper portion of the contact plug and is connected to the metal via.