公开(公告)号：US08901533B2

公开(公告)日：2014-12-02

申请号：US13789873

申请日：2013-03-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang-moon Lee ,  Young-jin Cho

IPC: H01L29/12 ,  H01L31/0336 ,  H01L31/072 ,  H01L21/00 ,  H01L21/337 ,  H01L29/778 ,  H01L29/10 ,  H01L29/15 ,  H01L29/66 ,  H01L29/51 ,  H01L29/06

CPC classification number: H01L29/78 ,  H01L29/0657 ,  H01L29/1075 ,  H01L29/1079 ,  H01L29/15 ,  H01L29/205 ,  H01L29/517 ,  H01L29/66462 ,  H01L29/7781 ,  H01L29/7783

Abstract: Semiconductor devices including a substrate (e.g., silicon substrate), a multi-layer structure disposed on a portion of the substrate, and at least one electrode disposed on the multi-layer structure and methods of manufacturing the same are provided. The multi-layer structure may include an active layer containing a Group III-V material and a current blocking layer disposed between the substrate and the active layer. The semiconductor device may further include a buffer layer disposed between the substrate and the active layer. In a case that the substrate is a p-type, the buffer layer may be an n-type material layer and the current blocking layer may be a p-type material layer. The current blocking layer may contain a Group III-V material. A mask layer having an opening may be disposed on the substrate so that the multi-layer structure may be disposed on the portion of the substrate exposed by the opening.

Abstract translation: 提供了包括衬底（例如，硅衬底），设置在衬底的一部分上的多层结构以及设置在多层结构上的至少一个电极的半导体器件及其制造方法。 多层结构可以包括含有III-V族材料的有源层和设置在衬底和有源层之间的电流阻挡层。 半导体器件还可以包括设置在衬底和有源层之间的缓冲层。 在基板是p型的情况下，缓冲层可以是n型材料层，电流阻挡层可以是p型材料层。 电流阻挡层可以含有III-V族材料。 具有开口的掩模层可以设置在基板上，使得多层结构可以设置在由开口暴露的基板的部分上。