公开(公告)号：US11715713B2

公开(公告)日：2023-08-01

申请号：US17405637

申请日：2021-08-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ji Won Kim ,  Jae Ho Ahn ,  Sung-Min Hwang ,  Joon-Sung Lim ,  Suk Kang Sung

IPC: H01L25/065 ,  H01L25/18 ,  H01L23/00 ,  H01L25/00

CPC classification number: H01L24/08 ,  H01L24/80 ,  H01L25/0657 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/08145 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2924/1431 ,  H01L2924/14511

Abstract: The nonvolatile memory device includes a substrate including a first surface and a second surface opposite to the first surface in a first direction; a common source line on the first surface of the substrate; a plurality of word lines stacked on the common source line; a first insulating pattern spaced apart from the plurality of word lines in a second direction crossing the first direction, and in the substrate; an insulating layer on the second surface of the substrate; a first contact plug penetrating the first insulating pattern and extending in the first direction; a second contact plug penetrating the insulating layer, extending in the first direction, and connected to the first contact plug; an upper bonding metal connected to the first contact plug and connected to a circuit element; and a first input/output pad connected to the second contact plug and electrically connected to the circuit element.

公开(公告)号：US11574883B2

公开(公告)日：2023-02-07

申请号：US17389841

申请日：2021-07-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae Ho Ahn ,  Ji Won Kim ,  Sung-Min Hwang ,  Joon-Sung Lim ,  Suk Kang Sung

IPC: H01L25/065 ,  H01L23/535 ,  H01L23/00 ,  H01L25/18 ,  H01L21/768 ,  H01L25/00

Abstract: A semiconductor memory device includes a first substrate including opposite first and second surfaces, a mold structure including gate electrodes stacked on the first surface of the first substrate, a channel structure through the mold structure, a first contact via penetrating the first substrate, a second substrate including opposite third and fourth surfaces, a circuit element on the third surface of the second substrate, a first through-via through the mold structure connecting the first contact via and the circuit element, the first through-via including a first conductive pattern, and a first spacer separating the first conductive pattern from the mold structure, and a second through-via through the mold structure and spaced apart from the first through-via, the second through-via including a second conductive pattern, and a second spacer separating the second conductive pattern from the first substrate and the mold structure.