GNSS RECEIVER AND MOBILE SYSTEM INCLUDING THE SAME

    公开(公告)号:US20170115401A1

    公开(公告)日:2017-04-27

    申请号:US15293796

    申请日:2016-10-14

    Abstract: A GNSS receiver includes a RF unit, a baseband processing unit, a storage unit, a mode control unit and a counter unit. The RF unit receives a satellite signal from an external satellite. The baseband processing unit determines present operation environment of the GNSS receiver based on the satellite signal. The storage unit stores information received by the RF unit and information generated by the baseband processing unit. The mode control unit controls an operation mode of the GNSS receiver based on the present operation environment. The operation mode includes a normal mode and a low power mode. The counter unit counts a first number representing a number of consecutive times in which the GNSS receiver has entered the low power mode. When the GNSS receiver enters the low power mode, the mode control unit turns off at least one of the RF unit, the baseband processing unit and the storage unit based on the first number.

    Buffer circuit for semiconductor device
    13.
    发明授权
    Buffer circuit for semiconductor device 有权
    半导体器件缓冲电路

    公开(公告)号:US08742801B2

    公开(公告)日:2014-06-03

    申请号:US13717931

    申请日:2012-12-18

    CPC classification number: H03K19/018514

    Abstract: A buffer circuit is provided which is insensitive to a duty distortion regardless of the change of operation environment. The buffer circuit includes a current mode logic buffer and a differential-to-single-ended converter. The differential-to-single-ended converter receives first and second differential output signals to generate a single ended output signal and is configured so that an internal control node of the differential-to-single-ended converter is controlled in a negative feedback method to maintain a constant duty ratio of the single ended output signal regardless of the change of operation environment. According to some embodiments, a duty distortion of the single ended output signal due to the change of operation environment such as a process, a voltage, a temperature, etc. is reduced or minimized and thereby performance of the buffer circuit is improved and operation reliability is improved.

    Abstract translation: 提供了缓冲电路,其对于占空比失真不敏感,而与操作环境的变化无关。 缓冲电路包括电流模式逻辑缓冲器和差分到单端转换器。 差分到单端转换器接收第一和第二差分输出信号以产生单端输出信号,并且被配置为使得差分到单端转换器的内部控制节点以负反馈方式被控制 保持单端输出信号的恒定占空比,而不管操作环境的变化。 根据一些实施例,减少或最小化由于诸如处理,电压,温度等的操作环境的改变引起的单端输出信号的占空比失真,从而提高缓冲电路的性能和操作可靠性 改进了

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