公开(公告)号：US20180261546A1

公开(公告)日：2018-09-13

申请号：US15831603

申请日：2017-12-05

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： SU-HYUN BARK ,  Sang-Hoon Ahn ,  Young-Bae Kim ,  Hyeok-Sang Oh ,  Woo-Jin Lee ,  Hoon-Seok Seo ,  Sung-Jin Kang

IPC分类号： H01L23/532 ,  H01L29/16 ,  H01L21/311 ,  H01L21/768 ,  H01L23/528 ,  H01L23/522

摘要： An integrated circuit device includes a metal film and a complex capping layer covering a top surface of the metal film. The metal film includes a first metal, and penetrates at least a portion of an insulating film formed over a substrate. The complex capping layer includes a conductive alloy capping layer covering the top surface of the metal film, and an insulating capping layer covering a top surface of the conductive alloy capping layer and a top surface of the insulating film. The conductive alloy capping layer includes a semiconductor element and a second metal different from the first metal. The insulating capping layer includes a third metal.

公开(公告)号：US09865594B2

公开(公告)日：2018-01-09

申请号：US15015296

申请日：2016-02-04

申请人： Samsung Electronics Co., Ltd.

发明人： Yong-Kong Siew ,  Sang-Hoon Ahn

IPC分类号： H01L29/40 ,  H01L21/20 ,  H01L27/088 ,  H01L21/762 ,  H01L23/482 ,  H01L23/522 ,  H01L23/532

CPC分类号： H01L27/0886 ,  H01L21/76264 ,  H01L21/76289 ,  H01L21/76811 ,  H01L21/7682 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76849 ,  H01L21/76897 ,  H01L23/4821 ,  H01L23/5222 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/5329 ,  H01L23/53295 ,  H01L29/41783 ,  H01L29/665 ,  H01L29/66545

摘要： A semiconductor device may include a plurality of wiring structures spaced apart from each other, a protection pattern including a metal nitride on each of the wiring structures, a spacer on a sidewall of the protection pattern, and an insulating interlayer structure containing the wiring structures and having an air gap between the wiring structures.

公开(公告)号：US09214381B2

公开(公告)日：2015-12-15

申请号：US14165817

申请日：2014-01-28

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Woo-Jin Lee ,  Sang-Hoon Ahn ,  Gil-Heyun Choi ,  Jong-Won Hong

IPC分类号： H01L21/70 ,  H01L21/768 ,  H01L29/76 ,  H01L29/788 ,  H01L21/764

CPC分类号： H01L29/0649 ,  H01L21/764 ,  H01L21/76805 ,  H01L21/7682 ,  H01L21/76831

摘要： A semiconductor device includes a substrate, a conductive pattern, a side spacer, and an air gap. The substrate includes an interlayer insulating layer and a trench penetrating the interlayer insulating layer. The conductive pattern is disposed within the trench of the substrate. The side spacer is disposed within the trench. The side spacer covers an upper side surface of the conductive pattern. The air gap is disposed within the trench. The air gap is bounded by a sidewall of the trench, the side spacer, and a lower side surface of the conductive pattern. A level of a bottom surface of the conductive pattern is lower than a level of bottom surfaces of the side spacer.

摘要翻译： 半导体器件包括衬底，导电图案，侧面间隔物和气隙。 衬底包括层间绝缘层和贯穿层间绝缘层的沟槽。 导电图案设置在基板的沟槽内。 侧间隔件设置在沟槽内。 侧隔板覆盖导电图案的上侧表面。 气隙设置在沟槽内。 气隙由沟槽的侧壁，侧面间隔物和导电图案的下侧表面限定。 导电图案的底面的水平比侧面间隔物的底面的水平低。

公开(公告)号：US11011469B2

公开(公告)日：2021-05-18

申请号：US16285735

申请日：2019-02-26

申请人： Samsung Electronics Co., Ltd.

发明人： Jun-Kwan Kim ,  Jae-Wha Park ,  Sang-Hoon Ahn

IPC分类号： H01L23/532 ,  H01L23/522 ,  H01L21/768 ,  H01L21/8234 ,  H01L21/02 ,  H01L21/311 ,  H01L21/288 ,  H01L21/321 ,  H01L23/528 ,  C23C16/36 ,  C23C16/50 ,  C23C16/40

摘要： A semiconductor may include a first inter metal dielectric (IMD) layer, a first blocking layer on the first IMD layer, a metal wiring and a second blocking layer. The first inter metal dielectric (IMD) layer may be formed on a substrate, the first IMD layer may include a low-k material having a dielectric constant lower than a dielectric constant of silicon oxide. The first blocking layer may be formed on the first IMD layer. The first blocking layer may include an oxide having a dielectric constant higher than the dielectric constant of the first IMD layer. The metal wiring may be through the first IMD layer and the first blocking layer. The second blocking layer may be formed on the metal wiring and the first blocking layer. The second blocking layer may include a nitride. The first and second blocking layers may reduce or prevent from the out gassing, so that a semiconductor device may have good characteristics.

公开(公告)号：US10700164B2

公开(公告)日：2020-06-30

申请号：US16274350

申请日：2019-02-13

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Jin-Nam Kim ,  Rak-Hwan Kim ,  Byung-Hee Kim ,  Jong-Min Baek ,  Sang-Hoon Ahn ,  Nae-In Lee ,  Jong-Jin Lee ,  Ho-Yun Jeon ,  Eun-Ji Jung

IPC分类号： H01L29/08 ,  H01L23/532 ,  H01L21/768 ,  H01L23/522 ,  H01L23/528 ,  H01L27/088 ,  H01L27/12

摘要： Semiconductor devices may include a diffusion prevention insulation pattern, a plurality of conductive patterns, a barrier layer, and an insulating interlayer. The diffusion prevention insulation pattern may be formed on a substrate, and may include a plurality of protrusions protruding upwardly therefrom. Each of the conductive patterns may be formed on each of the protrusions of the diffusion prevention insulation pattern, and may have a sidewall inclined by an angle in a range of about 80 degrees to about 135 degrees to a top surface of the substrate. The barrier layer may cover a top surface and the sidewall of each if the conductive patterns. The insulating interlayer may be formed on the diffusion prevention insulation pattern and the barrier layer, and may have an air gap between neighboring ones of the conductive patterns.

公开(公告)号：US10276505B2

公开(公告)日：2019-04-30

申请号：US15846498

申请日：2017-12-19

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Young-Bae Kim ,  Sang-Hoon Ahn ,  Eui-Bok Lee ,  Su-Hyun Bark ,  Hyeok-Sang Oh ,  Woo-Jin Lee ,  Hoon-Seok Seo ,  Sung-Jin Kang

IPC分类号： H01L29/00 ,  H01L23/532 ,  H01L23/522 ,  H01L23/528

摘要： An integrated circuit (IC) device includes a lower wiring structure including a lower metal film. The lower wiring structure penetrates at least a portion of a first insulating film disposed over a substrate. The IC device further includes a capping layer covering a top surface of the lower metal film, a second insulating film covering the capping layer, an upper wiring structure penetrating the second insulating film and the capping layer, and electrically connected to the lower metal film, and an air gap disposed between the lower metal film and the second insulating film. The air gap has a width defined by a distance between the capping layer and the upper wiring structure.

公开(公告)号：US20170294337A1

公开(公告)日：2017-10-12

申请号：US15632884

申请日：2017-06-26

申请人： Samsung Electronics Co., Ltd.

发明人： Jin-Nam KIM ,  Rak-Hwan Kim ,  Byung-Hee Kim ,  Jong-Min Baek ,  Sang-Hoon Ahn ,  Nae-In Lee ,  Jong-Jin Lee ,  Ho-Yun Jeon ,  Eun-Ji Jung

IPC分类号： H01L21/768 ,  H01L23/528 ,  H01L23/532

CPC分类号： H01L29/0847 ,  H01L21/7682 ,  H01L21/76834 ,  H01L21/76837 ,  H01L21/76852 ,  H01L21/76862 ,  H01L21/76885 ,  H01L23/5222 ,  H01L23/5283 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/53295 ,  H01L27/0886 ,  H01L27/1211

摘要： Semiconductor devices may include a diffusion prevention insulation pattern, a plurality of conductive patterns, a barrier layer, and an insulating interlayer. The diffusion prevention insulation pattern may be formed on a substrate, and may include a plurality of protrusions protruding upwardly therefrom. Each of the conductive patterns may be formed on each of the protrusions of the diffusion prevention insulation pattern, and may have a sidewall inclined by an angle in a range of about 80 degrees to about 135 degrees to a top surface of the substrate. The barrier layer may cover a top surface and the sidewall of each if the conductive patterns. The insulating interlayer may be formed on the diffusion prevention insulation pattern and the barrier layer, and may have an air gap between neighboring ones of the conductive patterns.

公开(公告)号：US20160300792A1

公开(公告)日：2016-10-13

申请号：US15059438

申请日：2016-03-03

申请人： Samsung Electronics Co., Ltd.

发明人： Jin-Nam KIM ,  Rak-Hwan Kim ,  Byung-Hee Kim ,  Jong-Min Baek ,  Sang-Hoon Ahn ,  Nae-In Lee ,  Jong-Jin Lee ,  Ho-Yun Jeon ,  Eun-Ji Jung

IPC分类号： H01L23/528 ,  H01L29/78 ,  H01L29/08 ,  H01L29/51 ,  H01L29/16 ,  H01L29/161 ,  H01L23/532 ,  H01L29/06

CPC分类号： H01L29/0847 ,  H01L21/7682 ,  H01L21/76834 ,  H01L21/76837 ,  H01L21/76852 ,  H01L21/76862 ,  H01L21/76885 ,  H01L23/5222 ,  H01L23/5283 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/53295 ,  H01L27/0886 ,  H01L27/1211

摘要： Semiconductor devices may include a diffusion prevention insulation pattern, a plurality of conductive patterns, a barrier layer, and an insulating interlayer. The diffusion prevention insulation pattern may be formed on a substrate, and may include a plurality of protrusions protruding upwardly therefrom. Each of the conductive patterns may be formed on each of the protrusions of the diffusion prevention insulation pattern, and may have a sidewall inclined by an angle in a range of about 80 degrees to about 135 degrees to a top surface of the substrate. The barrier layer may cover a top surface and the sidewall of each if the conductive patterns. The insulating interlayer may be formed on the diffusion prevention insulation pattern and the barrier layer, and may have an air gap between neighboring ones of the conductive patterns.

摘要翻译： 半导体器件可以包括扩散防止绝缘图案，多个导电图案，阻挡层和绝缘中间层。 扩散防止绝缘图案可以形成在基板上，并且可以包括从其向上突出的多个突起。 每个导电图案可以形成在防扩散绝缘图案的每个突起上，并且可以具有相对于基板的顶表面倾斜约80度至约135度范围内的角度的侧壁。 如果导电图案，阻挡层可以覆盖每个的顶表面和侧壁。 绝缘中间层可以形成在防扩散绝缘图案和阻挡层上，并且可以在相邻的导电图案之间具有气隙。

公开(公告)号：US09390966B2

公开(公告)日：2016-07-12

申请号：US14516774

申请日：2014-10-17

申请人： Samsung Electronics Co., Ltd.

发明人： Woo-Kyung You ,  Sang-Ho Rha ,  Jong-Min Baek ,  Sang-Hoon Ahn ,  Nae-In Lee

IPC分类号： H01L21/768 ,  H01L21/3065 ,  H01L21/764

CPC分类号： H01L21/7682 ,  H01L21/3065 ,  H01L21/764 ,  H01L21/76826 ,  H01L21/76849 ,  H01L21/76877

摘要： Methods of forming a wiring structure are provided including forming an insulating interlayer on a substrate and forming a sacrificial layer on the insulating interlayer. The sacrificial layer is partially removed to define a plurality of openings. Wiring patterns are formed in the openings. The sacrificial layer is transformed into a modified sacrificial layer by a plasma treatment. The modified sacrificial layer is removed by a wet etching process. An insulation layer covering the wiring patterns is formed on the insulating interlayer. The insulation layer defines an air gap therein between neighboring wiring patterns.

摘要翻译： 提供形成布线结构的方法包括在基板上形成绝缘中间层并在绝缘中间层上形成牺牲层。 牺牲层被部分地去除以限定多个开口。 在开口中形成接线图案。 通过等离子体处理将牺牲层转变成改性的牺牲层。 通过湿蚀刻工艺去除改性牺牲层。 在绝缘中间层上形成覆盖布线图案的绝缘层。 绝缘层在相邻布线图案之间限定了气隙。

公开(公告)号：US11574871B2

公开(公告)日：2023-02-07

申请号：US17228861

申请日：2021-04-13

申请人： Samsung Electronics Co., Ltd.

发明人： Jun-Kwan Kim ,  Jae-Wha Park ,  Sang-Hoon Ahn

IPC分类号： H01L23/532 ,  H01L23/522 ,  H01L21/768 ,  H01L21/8234 ,  H01L21/02 ,  H01L21/311 ,  H01L21/288 ,  H01L21/321 ,  H01L23/528 ,  C23C16/36 ,  C23C16/50 ,  C23C16/40

摘要： A semiconductor may include a first inter metal dielectric (IMD) layer, a first blocking layer on the first IMD layer, a metal wiring and a second blocking layer. The first inter metal dielectric (IMD) layer may be formed on a substrate, the first IMD layer may include a low-k material having a dielectric constant lower than a dielectric constant of silicon oxide. The first blocking layer may be formed on the first IMD layer. The first blocking layer may include an oxide having a dielectric constant higher than the dielectric constant of the first IMD layer. The metal wiring may be through the first IMD layer and the first blocking layer. The second blocking layer may be formed on the metal wiring and the first blocking layer. The second blocking layer may include a nitride. The first and second blocking layers may reduce or prevent from the out gassing, so that a semiconductor device may have good characteristics.