Semiconductor devices and methods of manufacturing the same

    公开(公告)号:US11037872B2

    公开(公告)日:2021-06-15

    申请号:US16374901

    申请日:2019-04-04

    Abstract: A semiconductor device and a method of manufacturing a semiconductor device, the semiconductor device including a substrate; a first insulating interlayer on the substrate; a first wiring in the first insulating interlayer on the substrate; an insulation pattern on a portion of the first insulating interlayer adjacent to the first wiring, the insulation pattern having a vertical sidewall and including a low dielectric material; an etch stop structure on the first wiring and the insulation pattern; a second insulating interlayer on the etch stop structure; and a via extending through the second insulating interlayer and the etch stop structure to contact an upper surface of the first wiring.

    Semiconductor device and method of fabricating the same
    5.
    发明授权
    Semiconductor device and method of fabricating the same 有权
    半导体装置及其制造方法

    公开(公告)号:US09214381B2

    公开(公告)日:2015-12-15

    申请号:US14165817

    申请日:2014-01-28

    Abstract: A semiconductor device includes a substrate, a conductive pattern, a side spacer, and an air gap. The substrate includes an interlayer insulating layer and a trench penetrating the interlayer insulating layer. The conductive pattern is disposed within the trench of the substrate. The side spacer is disposed within the trench. The side spacer covers an upper side surface of the conductive pattern. The air gap is disposed within the trench. The air gap is bounded by a sidewall of the trench, the side spacer, and a lower side surface of the conductive pattern. A level of a bottom surface of the conductive pattern is lower than a level of bottom surfaces of the side spacer.

    Abstract translation: 半导体器件包括衬底,导电图案,侧面间隔物和气隙。 衬底包括层间绝缘层和贯穿层间绝缘层的沟槽。 导电图案设置在基板的沟槽内。 侧间隔件设置在沟槽内。 侧隔板覆盖导电图案的上侧表面。 气隙设置在沟槽内。 气隙由沟槽的侧壁,侧面间隔物和导电图案的下侧表面限定。 导电图案的底面的水平比侧面间隔物的底面的水平低。

    Devices, systems and methods with improved refresh address generation
    6.
    发明授权
    Devices, systems and methods with improved refresh address generation 有权
    改善刷新地址生成的设备,系统和方法

    公开(公告)号:US09355703B2

    公开(公告)日:2016-05-31

    申请号:US14077187

    申请日:2013-11-11

    CPC classification number: G11C11/40611 G11C11/40622 G11C29/028 G11C29/50016

    Abstract: A refresh address generator may include a lookup table including a first portion storing a first group of addresses associated with a first data retention time, and a second portion storing a second group of addresses associated with a second data retention time different from the first data retention time, wherein the addresses of the first portion are more frequently accessed than the addresses of the second portion to refresh the memory cells corresponding to the addresses. Systems and methods may also implement such refresh address generation.

    Abstract translation: 刷新地址生成器可以包括查找表,其包括存储与第一数据保留时间相关联的第一组地址的第一部分,以及存储与第二数据保留时间相关联的第二组地址的第二部分,该第二组地址与第一数据保留不同 时间,其中第一部分的地址比第二部分的地址更频繁地访问以刷新对应于地址的存储单元。 系统和方法也可以实现这种刷新地址生成。

    BUFFER CIRCUIT FOR SEMICONDUCTOR DEVICE
    7.
    发明申请
    BUFFER CIRCUIT FOR SEMICONDUCTOR DEVICE 有权
    半导体器件的缓冲电路

    公开(公告)号:US20130214843A1

    公开(公告)日:2013-08-22

    申请号:US13717931

    申请日:2012-12-18

    CPC classification number: H03K19/018514

    Abstract: A buffer circuit is provided which is insensitive to a duty distortion regardless of the change of operation environment. The buffer circuit includes a current mode logic buffer and a differential-to-single-ended converter. The differential-to-single-ended converter receives first and second differential output signals to generate a single ended output signal and is configured so that an internal control node of the differential-to-single-ended converter is controlled in a negative feedback method to maintain a constant duty ratio of the single ended output signal regardless of the change of operation environment. According to some embodiments, a duty distortion of the single ended output signal due to the change of operation environment such as a process, a voltage, a temperature, etc. is reduced or minimized and thereby performance of the buffer circuit is improved and operation reliability is improved.

    Abstract translation: 提供了缓冲电路,其对于占空比失真不敏感,而与操作环境的变化无关。 缓冲电路包括电流模式逻辑缓冲器和差分到单端转换器。 差分到单端转换器接收第一和第二差分输出信号以产生单端输出信号,并且被配置为使得差分到单端转换器的内部控制节点以负反馈方式被控制 保持单端输出信号的恒定占空比,而不管操作环境的变化。 根据一些实施例,减少或最小化由于诸如处理,电压,温度等的操作环境的改变引起的单端输出信号的占空比失真,从而提高缓冲电路的性能和操作可靠性 改进了

    GNSS receiver and mobile system including the same

    公开(公告)号:US10444374B2

    公开(公告)日:2019-10-15

    申请号:US15293796

    申请日:2016-10-14

    Abstract: A GNSS receiver includes a RF unit, a baseband processing unit, a storage unit, a mode control unit and a counter unit. The RF unit receives a satellite signal from an external satellite. The baseband processing unit determines present operation environment of the GNSS receiver based on the satellite signal. The storage unit stores information received by the RF unit and information generated by the baseband processing unit. The mode control unit controls an operation mode of the GNSS receiver based on the present operation environment. The operation mode includes a normal mode and a low power mode. The counter unit counts a first number representing a number of consecutive times in which the GNSS receiver has entered the low power mode. When the GNSS receiver enters the low power mode, the mode control unit turns off at least one of the RF unit, the baseband processing unit and the storage unit based on the first number.

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