Semiconductor device and method of operating the same

    公开(公告)号:US11183945B2

    公开(公告)日:2021-11-23

    申请号:US16846559

    申请日:2020-04-13

    Abstract: Provided are a semiconductor device and a method of operating the same. A semiconductor device may include a comparator which compares a first voltage with a rectified voltage and provides a second voltage in accordance with the comparison. A timer circuit may operate a timer according to the second voltage and output a third voltage in correspondence with an operation time of the timer. A driver may drive a transistor with a fourth voltage generated by the driver according to the third voltage. A calibration circuit may generate a timer calibration signal based on the second voltage and the fourth voltage. The timer calibration signal may be provided to the timer circuit and used to calibrate the operation time of the timer. More efficient rectification, with reduced occurrence of reverse current, may thereby be realized.

    Charger circuit including a plurality of charging paths

    公开(公告)号:US09973017B2

    公开(公告)日:2018-05-15

    申请号:US14856376

    申请日:2015-09-16

    CPC classification number: H02J7/0068 H02J7/0052 H02J7/007

    Abstract: A charger circuit includes a first path regulator, a path switch, and a second path regulator. The first path regulator is configured to generate a first regulation current based on an input voltage and an input current. The path switch is configured to pass or block a first charging current in response to a control signal. The first charging current is generated based on the first regulation current. The second path regulator is configured to generate a second regulation current based on the input voltage and the input current. At least one of the first charging current and a second charging current is used to charge a battery. The second charging current is generated based on the second regulation current. The second charging current is transferred to the battery without passing through the path switch.

    Buck converter and boost converter with dead time adjustment

    公开(公告)号:US09793811B2

    公开(公告)日:2017-10-17

    申请号:US14735836

    申请日:2015-06-10

    CPC classification number: H02M3/1588 Y02B70/1466

    Abstract: A voltage converter includes first and second charging elements, first and second switches, and first and second switch controllers. The first switch controller adjusts a first activation timing of a first control signal in response to a pulse width modulation signal, a switch signal, and a first control signal. The first control signal is a signal for controlling the first switch. The second switch controller adjusts a second activation timing of a second control signal in response to the pulse width modulation signal, the first control signal, and a second control signal. The second control signal is a signal for controlling the second switch.

    Signal generation circuit, method of operating a signal generation circuit, and device for generating an output voltage
    16.
    发明授权
    Signal generation circuit, method of operating a signal generation circuit, and device for generating an output voltage 有权
    信号发生电路,操作信号发生电路的方法以及用于产生输出电压的装置

    公开(公告)号:US09128504B2

    公开(公告)日:2015-09-08

    申请号:US13755190

    申请日:2013-01-31

    Inventor: Gil Won Yoon Yus Ko

    CPC classification number: G05F1/625 H02M1/36 H02M3/156 H03K5/15013 H03K7/08

    Abstract: A signal generation circuit includes: a clock signal generator configured to generate a clock signal and to change a frequency of the clock signal in response to a select signal; a transmission control circuit configured to control transmission of the clock signal based on the select signal; and a counter configured to perform an operation among a count operation and a count stop operation based on an output signal of the transmission control circuit and to output the select signal based on a result of performing the operation. When the counter performs the count operation in response to the clock signal output from the transmission control circuit, the counter outputs a most significant bit (MSB) among its count bits as the select signal.

    Abstract translation: 信号发生电路包括:时钟信号发生器,被配置为响应于选择信号产生时钟信号并改变时钟信号的频率; 发送控制电路,被配置为基于所述选择信号来控制所述时钟信号的发送; 以及计数器,被配置为基于传输控制电路的输出信号在计数操作和计数停止操作之间执行操作,并且基于执行操作的结果来输出选择信号。 当计数器响应于从传输控制电路输出的时钟信号执行计数操作时,计数器输出其计数位之中的最高有效位(MSB)作为选择信号。

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