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    SYSTEMS, METHODS, AND APPARATUS FOR CACHE OPERATION IN STORAGE DEVICES
    12.
    发明申请
    SYSTEMS, METHODS, AND APPARATUS FOR CACHE OPERATION IN STORAGE DEVICES 有权

    公开(公告)号：US20240403241A1

    公开(公告)日：2024-12-05

    申请号：US18630988

    申请日：2024-04-09

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Zongwang LI ,  Tong ZHANG ,  Rekha PITCHUMANI

    IPC: G06F13/16 ,  G06F13/18

    Abstract: A device may include a storage medium, a cache medium, a buffer medium, and at least one control circuit configured to perform one or more operations including receiving a first request to access the storage medium, accessing, based on the first request, the cache medium, copying, from a portion of the storage medium to the buffer medium, data, modifying, based on the copying, an availability of the at least a portion of the storage medium, receiving a second request to access the storage medium, and accessing, based on the second request, the buffer medium. The one or more operations may include determining a location of data associated with the second request, and accessing, based on the determining, the buffer medium. The one or more operations may include receiving information about a location of data associated with the second request, and accessing, based on the information, the buffer medium.

    SYSTEMS, METHODS, AND APPARATUS FOR CACHE CONFIGURATION BASED ON STORAGE PLACEMENT
    13.
    发明申请
    SYSTEMS, METHODS, AND APPARATUS FOR CACHE CONFIGURATION BASED ON STORAGE PLACEMENT 有权

    公开(公告)号：US20240402924A1

    公开(公告)日：2024-12-05

    申请号：US18418066

    申请日：2024-01-19

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Zongwang LI ,  Tong ZHANG ,  Rekha PITCHUMANI

    IPC: G06F3/06

    Abstract: A device may include a first memory media, a second memory media, and at least one control circuit configured to receive placement information for data, store, in a portion of the first memory media, based on the placement information, the data, and store, in a portion of the second memory media, based on the placement information, the data. The at least one control circuit may be configured to receive a request to access, from the portion of the first memory media, the data, and access, based on the request, from the portion of the second memory media, the data. The at least one control circuit may be configured to modify, based on an allocation status, the portion of the first memory media to an available state.

    BINDING APPLICATION TO NAMESPACE (NS) TO SET TO SUBMISSION QUEUE (SQ) AND ASSIGNING PERFORMANCE SERVICE LEVEL AGREEMENT (SLA) AND PASSING IT TO A STORAGE DEVICE
    16.
    发明申请
    BINDING APPLICATION TO NAMESPACE (NS) TO SET TO SUBMISSION QUEUE (SQ) AND ASSIGNING PERFORMANCE SERVICE LEVEL AGREEMENT (SLA) AND PASSING IT TO A STORAGE DEVICE 有权

    公开(公告)号：US20220147247A1

    公开(公告)日：2022-05-12

    申请号：US17189255

    申请日：2021-03-01

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Ramzi AMMARI ,  Rajinikanth PANDURANGAN ,  Changho CHOI ,  Zongwang LI

    IPC: G06F3/06

    Abstract: A host interface layer in a storage device is described. The host interface layer may include an arbitrator to select a first submission queue (SQ) from a set including at least the first SQ and a second SQ. The first SQ may be associated with a first Quality of Service (QoS) level, and the second SQ may be associated with a second QoS level. A command fetcher may retrieve an input/output (I/O) request from the first SQ. A command parser may place the I/O request in a first command queue from a set including at least the first command queue and a second command queue. The arbitrator may be configured to select the first SQ based at least in part on a first weight associated with the first SQ and a second weight associated with the second SQ. The first weight may be based at least in part on a first total storage capacity of at least one first namespace (NS) associated with the first QoS level, and the second weight may be based at least in part on a second total storage capacity of at least one second NS associated with the second QoS level.

    SYSTEMS, METHODS, AND DEVICES FOR BIAS MODE MANAGEMENT IN MEMORY SYSTEMS
    19.
    发明申请
    SYSTEMS, METHODS, AND DEVICES FOR BIAS MODE MANAGEMENT IN MEMORY SYSTEMS 有权

    公开(公告)号：US20220405207A1

    公开(公告)日：2022-12-22

    申请号：US17500927

    申请日：2021-10-13

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Armin HAJ ABOUTALEBI ,  Rekha PITCHUMANI ,  Zongwang LI ,  Marie Mai NGUYEN

    IPC: G06F12/0882 ,  G06F12/02 ,  G06F13/16 ,  G06K9/62 ,  G06N20/00

    Abstract: A method for managing a memory system may include monitoring one or more accesses of a page of memory, determining, based on the monitoring, an access pattern of the page of memory, and selecting, based on the access pattern, a coherency bias for the page of memory. The monitoring may include maintaining an indication of the one or more accesses. The determining may include comparing the indication to a threshold. Maintaining the indication may include changing the indication in a first manner based on an access of the page of memory by a first apparatus. Maintaining the indication may include changing the indication in a second manner based on an access of the page of memory by a second apparatus. The first manner may counteract the second manner.

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