公开(公告)号：US20240395613A1

公开(公告)日：2024-11-28

申请号：US18794736

申请日：2024-08-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Keunwook SHIN ,  Sanghoon AHN ,  Woojin LEE ,  Kyung-Eun BYUN ,  Junghoo SHIN ,  Hyeonjin SHIN ,  Yunseong LEE

IPC: H01L21/768 ,  H01L21/285

Abstract: Provided is a method of forming an interconnect structure. The method includes preparing a substrate including a first metal layer and a first insulating layer, selectively forming a carbon layer having an sp2 bonding structure on the first metal layer, selectively forming a second insulating layer on the first insulating layer, forming a third insulating layer to cover the second insulating layer, and forming a second metal layer electrically connected to the first metal layer.

公开(公告)号：US20220068704A1

公开(公告)日：2022-03-03

申请号：US17411467

申请日：2021-08-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Keunwook SHIN ,  Sanghoon AHN ,  Woojin LEE ,  Kyung-Eun BYUN ,  Junghoo SHIN ,  Hyeonjin SHIN ,  Yunseong LEE

IPC: H01L21/768

Abstract: Provided is a method of forming an interconnect structure. The method includes preparing a substrate including a first metal layer and a first insulating layer, selectively forming a carbon layer having an sp2 bonding structure on the first metal layer, selectively forming a second insulating layer on the first insulating layer, forming a third insulating layer to cover the second insulating layer, and forming a second metal layer electrically connected to the first metal layer.

公开(公告)号：US20210125856A1

公开(公告)日：2021-04-29

申请号：US16872955

申请日：2020-05-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sanghoon AHN ,  Woojin LEE ,  Kyuhee HAN

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/532

Abstract: An integrated circuit device according to the inventive concepts includes lower wiring structures formed on a substrate, an air gap arranged between the lower wiring structures, a capping layer covering an upper surface of the air gap, an etch stop layer conformally covering an upper surfaces of the lower wiring structures and the capping layer and having a protrusion and recess structure, an insulating layer covering the etch stop layer, and an upper wiring structure penetrating the insulating layer and connected to the upper surface of the lower wiring structure not covered with the etch stop layer, wherein the upper wiring structure covers a portion of an upper surface of the capping layer, and a level of the upper surface of the capping layer is higher than a level of the upper surface of the lower wiring structures.

公开(公告)号：US20190157214A1

公开(公告)日：2019-05-23

申请号：US16027484

申请日：2018-07-05

Applicant: Samsung Electronics Co. Ltd.

Inventor： Jun Kwan KIM ,  Sanghoon AHN ,  Kyu-Hee HAN ,  JaeWha PARK ,  Heesook PARK

IPC: H01L23/532 ,  H01L23/522

Abstract: Provided is a semiconductor device comprising a device region on a substrate, an interlayer dielectric layer on the device region, a first interface layer on a side of the interlayer dielectric layer, a low-k dielectric layer spaced apart from the interlayer dielectric layer across the first interface layer and having a dielectric constant less than that of the interlayer dielectric layer, and a conductive line in the low-k dielectric layer. The first interface layer comprises a first sub-interface layer in contact with the low-k dielectric layer, and a second sub-interface layer in contact with the interlayer dielectric layer. The second sub-interface layer has hydrogen permeability less than that of the first sub-interface layer.

公开(公告)号：US20170092578A1

公开(公告)日：2017-03-30

申请号：US15375567

申请日：2016-12-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongmin BAEK ,  Sangho RHA ,  Sanghoon AHN ,  Wookyung YOU ,  Naein LEE

IPC: H01L23/528 ,  H01L23/532

CPC classification number: H01L23/528 ,  H01L21/7682 ,  H01L21/76834 ,  H01L23/5222 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Semiconductor devices are provided. A semiconductor device includes gaps between conductive patterns. Moreover, the semiconductor device includes a permeable layer on the conductive patterns. Methods of fabricating semiconductor devices are also provided.