公开(公告)号：US20180053797A1

公开(公告)日：2018-02-22

申请号：US15630063

申请日：2017-06-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ho-Jin LEE ,  Kwangjin MOON ,  Seokho KIM ,  Sukchul BANG ,  Jin Ho AN ,  Naein LEE

IPC: H01L27/146

CPC classification number: H01L27/1463 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14636 ,  H01L27/14645 ,  H01L27/14683 ,  H01L2224/11

Abstract: A semiconductor device includes a semiconductor substrate with first and second surfaces facing each other, an etch stop pattern in a trench formed in the first surface of the semiconductor substrate, a first insulating layer on the first surface of the semiconductor substrate, and a through via penetrating the semiconductor substrate and the first insulating layer. The etch stop pattern surrounds a portion of a lateral surface of the through via.

公开(公告)号：US20170084481A1

公开(公告)日：2017-03-23

申请号：US15273797

申请日：2016-09-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Woochoel NOH ,  Wonkyu HAN ,  Hyeoksang OH ,  Naein LEE ,  Gyeongyun HAN

IPC: H01L21/768 ,  H01L21/02

CPC classification number: H01L21/02068 ,  H01L21/3105 ,  H01L21/67115 ,  H01L21/76814 ,  H01L21/76825

Abstract: A method of fabricating a semiconductor device including an interlayer insulating layer and interconnections is provided. An interlayer insulating layer is formed on a substrate. An opening is formed in the interlayer insulating layer. A degassing process is performed by irradiating the interlayer insulating layer having the opening with microwaves. A K-value recovery process is performed by irradiating the interlayer insulating layer having the opening with UV light. A conductive layer is formed in the opening. The degassing process and the K-value recovery process are performed as an in-situ process.

公开(公告)号：US20180151490A1

公开(公告)日：2018-05-31

申请号：US15792911

申请日：2017-10-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Taejin YIM ,  Jongmin BAEK ,  Deokyoung JUNG ,  Kyuhee HAN ,  Byunghee KIM ,  Jiyoung KIM ,  Naein LEE ,  Sangshin JANG

IPC: H01L23/522 ,  H01L23/532 ,  H01L21/768

CPC classification number: H01L23/5222 ,  H01L21/76802 ,  H01L21/7682 ,  H01L21/76831 ,  H01L21/76843 ,  H01L23/5226 ,  H01L23/5228 ,  H01L23/53238 ,  H01L23/53295

Abstract: A semiconductor device is provided. The semiconductor device includes first metal lines on a lower layer, a dielectric barrier layer provided on the lower layer to cover side and top surfaces of the first metal lines, an etch stop layer provided on the dielectric barrier layer to define gap regions between the first metal lines, an upper insulating layer on the etch stop layer, and a conductive via penetrating the upper insulating layer, the etch stop layer, and the dielectric barrier layer to contact a top surface of a first metal line. The etch stop layer includes first portions on the first metal lines and second portions between the first metal lines. The second portions of the etch stop layer are higher than the first portions.

公开(公告)号：US20180130665A1

公开(公告)日：2018-05-10

申请号：US15679315

申请日：2017-08-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyun PARK ,  Naein LEE

IPC: H01L21/285 ,  H01L27/11582 ,  H01L21/28 ,  H01L21/3205 ,  H01L21/32 ,  H01L21/311 ,  H01L27/108

CPC classification number: H01L21/28562 ,  H01L21/28061 ,  H01L21/31144 ,  H01L21/32 ,  H01L21/32051 ,  H01L27/10814 ,  H01L27/10852 ,  H01L27/10855 ,  H01L27/11582 ,  H01L29/40117 ,  H01L29/66545

Abstract: A method of fabricating a semiconductor device, the method including forming a deposition active layer and a guide pattern on a semiconductor substrate such that the guide pattern delimits an exposed surface of the deposition active layer; and selectively depositing a metal-containing layer on the exposed surface of the deposition active layer exposed by the guide pattern, wherein the deposition active layer is a nonmetal layer.

公开(公告)号：US20170092578A1

公开(公告)日：2017-03-30

申请号：US15375567

申请日：2016-12-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongmin BAEK ,  Sangho RHA ,  Sanghoon AHN ,  Wookyung YOU ,  Naein LEE

IPC: H01L23/528 ,  H01L23/532

CPC classification number: H01L23/528 ,  H01L21/7682 ,  H01L21/76834 ,  H01L23/5222 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Semiconductor devices are provided. A semiconductor device includes gaps between conductive patterns. Moreover, the semiconductor device includes a permeable layer on the conductive patterns. Methods of fabricating semiconductor devices are also provided.