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公开(公告)号:US20240402910A1
公开(公告)日:2024-12-05
申请号:US18203075
申请日:2023-05-30
Applicant: Silicon Motion, Inc.
Inventor: Tsu-Han Lu , Hsiao-Chang Yen
IPC: G06F3/06
Abstract: A flash memory controller is used in a storage device and coupled to a flash memory device of the storage device through a specific communication interface and includes an input/output (I/O) circuit and a processor. The I/O circuit is used for sending commands and data between the flash memory device and the processor. The processor is used for controlling the I/O circuit sending a specific boundary check command signal or a specific boundary check set-feature signal via the specific communication interface to the flash memory device, to make the flash memory device read out more page data of multiple page units from a specific block in the memory cell array based on a smaller search range and to make the flash memory device determine whether the multiple page units are empty pages; the search range can be defined by a start page address stored in the flash memory device.
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公开(公告)号:US12105958B2
公开(公告)日:2024-10-01
申请号:US18094990
申请日:2023-01-10
Applicant: Silicon Motion, Inc.
Inventor: Tsu-Han Lu , Hsiao-Chang Yen
IPC: G06F3/06
CPC classification number: G06F3/061 , G06F3/0656 , G06F3/0659 , G06F3/0679
Abstract: A flash memory controller to be used in a storage device and coupled to a flash memory device of the storage device through a specific communication interface. The flash memory controller sends a debug injection set-feature signal to the flash memory device through the specific communication interface to configure an operation of a debug circuit of the flash memory device to make the debug circuit automatically generate debug information of an access operation of an access command signal sent from the flash memory controller, transmit the generated debug information from the flash memory device to the flash memory controller via the I/O control circuit and the specific communication interface, without controlling a memory cell array of flash memory device generating errors.
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公开(公告)号:US20240233849A1
公开(公告)日:2024-07-11
申请号:US18094989
申请日:2023-01-10
Applicant: Silicon Motion, Inc.
Inventor: Tsu-Han Lu , Hsiao-Chang Yen
IPC: G11C29/12
CPC classification number: G11C29/12005 , G11C29/1201
Abstract: A flash memory controller to be used in a storage device and coupled to a flash memory device of the storage device through a specific communication interface. The flash memory controller sends an error injection access command signal to the flash memory device through the specific communication interface to configure an operation of a debug circuit of the flash memory device to make the debug circuit automatically generate debug information of an access operation of the error injection access command signal sent from the flash memory controller, transmit the generated debug information from the flash memory device to the flash memory controller via the I/O control circuit and the specific communication interface, with controlling a memory cell array of flash memory device generating failure errors.
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公开(公告)号:US11914901B2
公开(公告)日:2024-02-27
申请号:US17852403
申请日:2022-06-29
Applicant: Silicon Motion, Inc.
Inventor: Tsu-Han Lu , Hsiao-Chang Yen
IPC: G06F3/06
CPC classification number: G06F3/0659 , G06F3/061 , G06F3/0679
Abstract: A method of a flash memory controller to be used in a storage device and coupled to a flash memory device of the storage device through a specific communication interface includes: using a set-feature signal, which carries a set-feature command, a macro execution feature address, and corresponding macro execution parameter information, as a macro execution signal and transmitting the macro execution signal to the flash memory device to make the flash memory device execute multiple set-feature operations respectively having unique information defined by the corresponding macro execution parameter information carried in the macro execution signal.
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公开(公告)号:US20230280939A1
公开(公告)日:2023-09-07
申请号:US17679103
申请日:2022-02-24
Applicant: Silicon Motion, Inc.
Inventor: Tsu-Han Lu , Hsiao-Chang Yen
IPC: G06F3/06
CPC classification number: G06F3/0659 , G06F3/0604 , G06F3/0679
Abstract: A method of a flash memory controller includes: providing an input/output (I/O) circuit coupled to a flash memory device through a specific communication interface; and, controlling a processor sending a specific read command or a data toggle command through the I/O circuit and the specific communication interface into the flash memory device, to make the flash memory device perform a data toggle operation to control the flash memory device’s data register selecting and transferring a first data unit and a second data unit to the flash memory device’s I/O control circuit to make the I/O control circuit sequentially transmit the first data unit and the second data unit to the flash memory controller through the specific communication interface in response to the specific read command or the data toggle command.
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公开(公告)号:US20230280929A1
公开(公告)日:2023-09-07
申请号:US17679120
申请日:2022-02-24
Applicant: Silicon Motion, Inc.
Inventor: Tsu-Han Lu , Hsiao-Chang Yen
IPC: G06F3/06
CPC classification number: G06F3/0655 , G06F3/061 , G06F3/0679
Abstract: A flash memory scheme simplifies the command sequences transmitted between a flash memory device and a flash memory controller into a simplified command sequence so as to reduce the waiting time period of the command transmission and improve the performance of flash memory.
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公开(公告)号:US20240402942A1
公开(公告)日:2024-12-05
申请号:US18202962
申请日:2023-05-29
Applicant: Silicon Motion, Inc.
Inventor: Tsu-Han Lu , Hsiao-Chang Yen
IPC: G06F3/06
Abstract: A method of a flash memory device to be used in a storage device and coupled to a flash memory controller of the storage device through a specific communication interface, the flash memory device comprising an input/output (I/O) control circuit, a command register, an address register, a memory cell array at least having a first plane and a second plane which is different from the first plane, at least one address decoder, and a control circuit having a specific buffer, and the method comprises: buffering command information of a command signal, sent from the flash memory controller and transmitted through the I/O control circuit, into the command register; buffering address information of the command signal, sent from the flash memory controller and transmitted through the I/O control circuit, into the address register; and controlling the specific buffer storing a transmission history information of the specific communication interface.
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公开(公告)号:US12158800B2
公开(公告)日:2024-12-03
申请号:US18094986
申请日:2023-01-10
Applicant: Silicon Motion, Inc.
Inventor: Tsu-Han Lu , Hsiao-Chang Yen
IPC: G06F11/07 , G06F3/06 , G06F12/0837 , G06F12/0882 , G06F12/128 , G06F119/02
Abstract: A flash memory controller to be used in a storage device and coupled to a flash memory device of the storage device through a specific communication interface. The flash memory controller sends a debug injection command signal to the flash memory device through the specific communication interface to configure an operation of a debug circuit of the flash memory device to make the debug circuit automatically generate debug information of an access operation of the debug injection command signal sent from the flash memory controller, transmit the generated debug information from the flash memory device to the flash memory controller via the I/O control circuit and the specific communication interface, without controlling a memory cell array of flash memory device generating errors.
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公开(公告)号:US12067240B2
公开(公告)日:2024-08-20
申请号:US17956855
申请日:2022-09-30
Applicant: Silicon Motion, Inc.
Inventor: Tsu-Han Lu , Hsiao-Chang Yen
IPC: G06F3/06
CPC classification number: G06F3/061 , G06F3/0658 , G06F3/0659 , G06F3/0679
Abstract: A method of a flash memory controller includes: controlling an I/O circuit using a set-feature signal, which carries a set-feature command, feature address, and parameter information, and transmitting the set-feature signal to a flash memory device; the feature address corresponds to a valid data portion or a dummy data portion following the valid data portion, and both the valid data potion and dummy data portion are comprised in a full page data which is to be written into a physical page unit of the flash memory device or to be read out from the physical page unit; the corresponding parameter information is used to record the valid data portion's column address and data length, the dummy data portion's column address and data length, the dummy data portion's column address and the valid data portion's column address, or the dummy data portion's data length and the valid data portion's data length.
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公开(公告)号:US12039171B2
公开(公告)日:2024-07-16
申请号:US17993896
申请日:2022-11-24
Applicant: Silicon Motion, Inc.
Inventor: Chia-Chi Liang , Hsiao-Chang Yen , Tsu-Han Lu
IPC: G06F3/06
CPC classification number: G06F3/0611 , G06F3/0659 , G06F3/0679 , G06F2212/7207
Abstract: A method for accessing a flash memory module includes: determining a type of data to be written into the flash memory module; selecting a specific encoding/decoding setting from a plurality of sets of encoding/decoding settings at least according to the type of data, wherein the plurality of sets of encoding/decoding settings correspond to different data lengths, respectively; utilizing the specific encoding/decoding setting to encode the data to generate encoded data; and writing the encoded data into a block of the flash memory module.
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