公开(公告)号：US20220013531A1

公开(公告)日：2022-01-13

申请号：US17179057

申请日：2021-02-18

Applicant: Silicon Storage Technology, Inc.

Inventor： Jeng-Wei YANG ,  Man-Tang WU ,  Boolean FAN ,  Nhan DO

IPC: H01L27/11524 ,  G11C16/04 ,  H01L29/66

Abstract: A method of forming a memory cell includes forming a first polysilicon block over an upper surface of a semiconductor substrate and having top surface and a side surface meeting at a sharp edge, forming an oxide layer with a first portion over the upper surface, a second portion directly on the side surface, and a third portion directly on the sharp edge, performing an etch that thins the oxide layer in a non-uniform manner such that the third portion is thinner than the first and second portions, performing an oxide deposition that thickens the first, second and third portions of the oxide layer, wherein after the oxide deposition, the third portion is thinner than the first and second portions, and forming a second polysilicon block having one portion directly on the first portion of the oxide layer and another portion directly on the third portion of the oxide layer.

公开(公告)号：US20210327512A1

公开(公告)日：2021-10-21

申请号：US17074103

申请日：2020-10-19

Applicant: Silicon Storage Technology, Inc.

Inventor： Leo XING ,  Chunming WANG ,  Xian LIU ,  Nhan DO ,  Guangming LIN ,  Yaohua ZHU

IPC: G11C16/12 ,  G11C16/14 ,  G11C16/26

Abstract: The present invention relates to a flash memory device that uses strap cells in a memory array of non-volatile memory cells as source line pull down circuits. In one embodiment, the strap cells are erase gate strap cells. In another embodiment, the strap cells are source line strap cells. In another embodiment, the strap cells are control gate strap cells. In another embodiment, the strap cells are word line strap cells.