公开(公告)号：US20210409014A1

公开(公告)日：2021-12-30

申请号：US17084901

申请日：2020-10-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Abishek MANIAN ,  Surya Theja GOLAKONDA ,  Robin GUPTA

IPC: H03K5/14 ,  H03L7/081

Abstract: A clockless delay adaptation loop configured to adapt to random data includes a first and a second delay line, an autocorrelator, and a controller. The autocorrelator receives an input signal for the delay adaptation loop and the output from the first delay line, and includes a first logic circuit configured to output a first autocorrelation and a second logic circuit configured to output a second autocorrelation. The controller is configured generate a control signal for one of the first and second delay lines based on the first and second autocorrelations. In some examples, the first logic circuit is an XNOR gate, and the second logic circuit is an OR gate. In some examples, the OR gate can have a gain that is two times a gain of the XNOR gate. In some examples, an amplifier having two times the gain of the XNOR gate is coupled to the OR gate.

公开(公告)号：US20210152165A1

公开(公告)日：2021-05-20

申请号：US17119050

申请日：2020-12-11

Applicant: Texas Instruments Incorporated

Inventor： Abishek MANIAN

IPC: H03K5/14 ,  H03K5/15 ,  H03K5/06 ,  H03K19/21

Abstract: An apparatus includes a clockless delay adaptation loop configured to adapt to random data. The apparatus also includes a circuit coupled to the clockless delay adaptation loop. The clockless delay adaptation loop includes a cascaded delay line and an autocorrelation control circuit coupled to the cascaded delay line, wherein an output of the autocorrelation control circuit is used to generate a control signal for the cascaded delay line.