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    Semi-global matching (SGM) cost compression
    11.
    发明授权
    Semi-global matching (SGM) cost compression 有权

    公开(公告)号：US11831874B2

    公开(公告)日：2023-11-28

    申请号：US17539945

    申请日：2021-12-01

    Applicant: Texas Instruments Incorporated

    Inventor： Do-Kyoung Kwon ,  Jing-Fei Ren ,  Darnell Moore

    IPC: H04N19/124 ,  H04N13/161 ,  H04N19/137 ,  H04N19/182 ,  G06T7/593 ,  H04N13/00

    CPC classification number: H04N19/124 ,  G06T7/593 ,  H04N13/161 ,  H04N19/137 ,  H04N19/182 ,  H04N2013/0081

    Abstract: This disclosure describes techniques for performing semi-global matching (SGM) path cost compression. In some examples, the techniques may perform disparity-dependent sub-sampling of a set of SGM path costs where the sub-sampling ratio is determined based on a candidate disparity level. The sub-sampled SGM path costs may be stored in a memory. When retrieved from memory, the sub-sampled SGM path costs may be interpolated to reconstruct the other path costs not stored in the memory. The reconstructed path costs may be used for further SGM processing. In further examples, the techniques may perform disparity-dependent quantization on the SGM path costs or the sub-sampled SGM path costs, and store the quantized SGM path costs in memory. The techniques of this disclosure may reduce bandwidth as well as reduce the memory footprint needed to implement an SGM algorithm.

    Robust connection for low-energy wireless networks
    13.
    发明授权
    Robust connection for low-energy wireless networks 有权

    公开(公告)号：US09647689B2

    公开(公告)日：2017-05-09

    申请号：US14598000

    申请日：2015-01-15

    Applicant: Texas Instruments Incorporated

    Inventor： Ariton E. Xhafa ,  Jing-Fei Ren

    IPC: H03M13/00 ,  H03M13/09 ,  H04B7/26 ,  H04L1/08 ,  H04L1/00

    CPC classification number: H03M13/09 ,  H04B7/26 ,  H04L1/0045 ,  H04L1/0061 ,  H04L1/0072 ,  H04L1/08

    Abstract: A system and method for detecting and correcting bit errors in received packets is disclosed. The presence of bit errors in a received packet are detected using CRC bits carried in the received packet. One or more erroneous bits may be identified in a header of the packet. The erroneous bits are corrected by setting the erroneous bits to match the expected bit settings. The corrected packet is then error-checked using the CRC bits. Errors may be detected in two sequential packets where a second packet is a retransmission of a first packet. Differing bits are identified in the two sequential packets. A packet is modified to include additional combinations of the differing bits and then error-checked with each combination of the differing bits. If a modified packet passes error checking, then process the modified packet.

    Defective pixel detection
    14.
    发明授权
    Defective pixel detection 有权

    公开(公告)号：US12244979B2

    公开(公告)日：2025-03-04

    申请号：US17983905

    申请日：2022-11-09

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Jing-Fei Ren ,  Hrushikesh Garud ,  Rajasekhar Allu ,  Gang Hua ,  Niraj Nandan ,  Mayank Mangla ,  Mihir Narendra Mody

    IPC: H04N9/64 ,  G06T7/00 ,  G06T7/90

    Abstract: Various embodiments disclosed herein relate to defective pixel detection and correction, and more specifically to using threshold functions based on color channels to compare pixel values to threshold values. A method is provided herein that comprises identifying a color channel of an image pixel in a frame and identifying a threshold function based at least on the color channel. The method further comprises applying the threshold function to one or more nearest-neighbor values to obtain a threshold value and determining whether a corresponding sensor pixel is defective based at least on a comparison of the image pixel to the threshold value.

    SEMI-GLOBAL MATCHING (SGM) COST COMPRESSION
    15.
    发明申请
    SEMI-GLOBAL MATCHING (SGM) COST COMPRESSION 审中-公开

    公开(公告)号：US20200186801A1

    公开(公告)日：2020-06-11

    申请号：US16794551

    申请日：2020-02-19

    Applicant: Texas Instruments Incorporated

    Inventor： Do-Kyoung Kwon ,  Jing-Fei Ren ,  Darnell Moore

    IPC: H04N19/124 ,  H04N13/161 ,  H04N19/137 ,  H04N19/182 ,  G06T7/593

    Abstract: This disclosure describes techniques for performing semi-global matching (SGM) path cost compression. In some examples, the techniques may perform disparity-dependent sub-sampling of a set of SGM path costs where the sub-sampling ratio is determined based on a candidate disparity level. The sub-sampled SGM path costs may be stored in a memory. When retrieved from memory, the sub-sampled SGM path costs may be interpolated to reconstruct the other path costs not stored in the memory. The reconstructed path costs may be used for further SGM processing. In further examples, the techniques may perform disparity-dependent quantization on the SGM path costs or the sub-sampled SGM path costs, and store the quantized SGM path costs in memory. The techniques of this disclosure may reduce bandwidth as well as reduce the memory footprint needed to implement an SGM algorithm.

    CRC-based forward error correction circuitry and method
    17.
    发明授权
    CRC-based forward error correction circuitry and method 有权
    基于CRC的前向纠错电路和方法

    公开(公告)号：US09543981B2

    公开(公告)日：2017-01-10

    申请号：US14224960

    申请日：2014-03-25

    Applicant: Texas Instruments Incorporated

    Inventor： Jing-Fei Ren ,  Manish Goel ,  Yuming Zhu

    IPC: H03M13/00 ,  H03M13/09 ,  H04L1/00

    CPC classification number: H03M13/09 ,  H04L1/0041 ,  H04L1/0045 ,  H04L1/0061 ,  H04L1/16

    Abstract: A CRC (cyclic redundancy check) generator circuit (28) generates a first CRC code based on a message. The CRC code is amended to the message, creating a first data packet. Circuitry transforms the first data packet to a second data packet for suitable transmission. Digital receiver circuitry receives the second data packet. A CRC verification circuit compares a received digital CRC code portion of the second data packet to a calculated digital CRC code portion. A message is presented for processing if no error is detected. A CRC-based FEC (forward error correction) circuit receives the message and calculates a digital CRC code from the verification circuit. When an error is detected, the detected error, based on a determination of whether the detected error affects an even number of bits or an odd number of bits, is corrected.

    Abstract translation: CRC（循环冗余校验）发生器电路（28）基于消息生成第一CRC码。 将CRC码修改为消息，创建第一个数据包。 电路将第一数据分组转换为第二数据分组以进行适当的传输。 数字接收机电路接收第二数据分组。 CRC验证电路将接收到的第二数据分组的数字CRC码部分与计算出的数字CRC码部分进行比较。 如果没有检测到错误，则显示一条消息用于处理。 基于CRC的FEC（前向纠错）电路接收消息并从验证电路计算数字CRC码。 当检测到错误时，基于检测到的误差是否影响偶数位或奇数位的确定，检测到的错误被校正。

    Robust Connection for Low-Energy Wireless Networks
    18.
    发明申请
    Robust Connection for Low-Energy Wireless Networks 有权
    低能耗无线网络的稳健连接

    公开(公告)号：US20160210189A1

    公开(公告)日：2016-07-21

    申请号：US14598000

    申请日：2015-01-15

    Applicant: Texas Instruments Incorporated

    Inventor： Ariton E. Xhafa ,  Jing-Fei Ren

    IPC: G06F11/10 ,  H03M13/09 ,  H04L1/08 ,  H04B7/26 ,  H04W84/18

    CPC classification number: H03M13/09 ,  H04B7/26 ,  H04L1/0045 ,  H04L1/0061 ,  H04L1/0072 ,  H04L1/08

    Abstract: A system and method for detecting and correcting bit errors in received packets is disclosed. The presence of bit errors in a received packet are detected using CRC bits carried in the received packet. One or more erroneous bits may be identified in a header of the packet. The erroneous bits are corrected by setting the erroneous bits to match the expected bit settings. The corrected packet is then error-checked using the CRC bits. Errors may be detected in two sequential packets where a second packet is a retransmission of a first packet. Differing bits are identified in the two sequential packets. A packet is modified to include additional combinations of the differing bits and then error-checked with each combination of the differing bits. If a modified packet passes error checking, then process the modified packet.

    Abstract translation: 公开了一种用于检测和纠正接收到的分组中的比特错误的系统和方法。 使用在接收到的分组中携带的CRC比特来检测接收分组中的比特错误的存在。 可以在分组的报头中识别一个或多个错误比特。 通过将错误位设置为与预期位设置相匹配来校正错误位。 然后使用CRC位对纠错的数据包进行错误检查。 可以在其中第二分组是第一分组的重传的两个连续分组中检测到错误。 在两个顺序包中标识不同的位。 修改分组以包括不同比特的附加组合，然后用不同比特的每个组合进行错误检查。 如果修改的数据包通过错误检查，则处理修改的数据包。

    Semi-global stereo correspondence processing with lossless image decomposition
    19.
    发明授权
    Semi-global stereo correspondence processing with lossless image decomposition 有权
    半全局立体声对应处理与无损图像分解

    公开(公告)号：US08897546B2

    公开(公告)日：2014-11-25

    申请号：US13632405

    申请日：2012-10-01

    Applicant: Texas Instruments Incorporated

    Inventor： Jing-Fei Ren ,  Manish Goel ,  Branislav Kisacanin

    IPC: G06K9/00 ,  G06T7/00

    CPC classification number: G06T7/0075 ,  G06T7/593 ,  G06T7/97 ,  G06T2207/10021 ,  G06T2207/20021

    Abstract: A method for disparity cost computation for a stereoscopic image is provided that includes computing path matching costs for external paths of at least some boundary pixels of a tile of a base image of the stereoscopic image, wherein a boundary pixel is a pixel at a boundary between the tile and a neighboring tile in the base image, storing the path matching costs for the external paths, computing path matching costs for pixels in the tile, wherein the stored path matching costs for the external paths of the boundary pixels are used in computing some of the path matching costs of some of the pixels in the tile, and computing aggregated disparity costs for the pixels in the tile, wherein the path matching costs computed for each pixel are used to compute the aggregated disparity costs for the pixel.

    Abstract translation: 提供了一种用于立体图像的视差成本计算的方法，其包括针对立体图像的基本图像的图块的至少一些边界像素的外部路径的计算路径匹配成本，其中边界像素是在 存储基本图像中的瓦片和相邻瓦片，存储外部路径的路径匹配成本，对于瓦片中的像素的计算路径匹配成本，其中，边缘像素的外部路径的存储路径匹配成本用于计算一些 的图块中的一些像素的路径匹配成本，以及计算图块中的像素的聚集的差异成本，其中为每个像素计算的路径匹配成本用于计算像素的聚集的视差成本。

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