BUCK-BOOST DC-DC CONVERTER
    11.
    发明申请

    公开(公告)号:US20190052173A1

    公开(公告)日:2019-02-14

    申请号:US15995331

    申请日:2018-06-01

    CPC classification number: H02M3/1582

    Abstract: Disclosed examples include inverting buck-boost DC-DC converter circuits with a switching circuit to alternate between first and second buck mode phases for buck operation in a first mode, including connecting an inductor and a capacitor in series between an input node and a reference node to charge the inductor and the capacitor in the first buck mode phase, and connecting the inductor and the capacitor in parallel between an output node and the reference node to discharge the inductor and the capacitor to the output node. For boost operation in a second mode, the switching circuit alternates between connecting the inductor and the capacitor in series between the input node and the reference node to discharge the inductor and charge the capacitor in a first boost mode phase, and connecting the inductor between the input node and the reference node to charge the inductor and connecting the capacitor between the first output node and the reference node to discharge the capacitor to deliver power to the output node in a second boost mode phase.

    Current sense circuit topology
    14.
    发明授权

    公开(公告)号:US11303210B2

    公开(公告)日:2022-04-12

    申请号:US16708066

    申请日:2019-12-09

    Abstract: Aspects of the present disclosure provide for a circuit. In at least some examples, the circuit includes a first switch coupled between a first node and a second node and a second switch coupled between a third node and the second node. The circuit further includes a resistor coupled between the second node and a fourth node and a capacitor comprising a first terminal coupled to the fourth node and a second terminal. The circuit further includes a transistor comprising a drain terminal coupled to the third node, a source terminal coupled to a fifth node, and a gate terminal and an amplifier comprising a first input terminal coupled to the fifth node, a second input terminal coupled to the fourth node, and an output terminal coupled to a sixth node.

    TIMER FOR CREATING A STABLE ON TIME
    16.
    发明申请

    公开(公告)号:US20190305676A1

    公开(公告)日:2019-10-03

    申请号:US16126705

    申请日:2018-09-10

    Abstract: A timer for creating a stable on time. The timer may have a reference voltage source, and an input voltage source. The voltage sources providing voltage that can be applied to a various circuit components such as capacitors, inductors, resistors, diodes, transistors, or other components. The reference voltage source may also be modified by a set of transistors coupled as a diode before being seen by an input of a timer comparator. The reference and input voltage source signals, which may be modified by circuit components, are compared by the timer comparator and then output as a timer control signal. The timer control signal may control a voltage converter, or the switches of a voltage converter.

    Buck-boost DC-DC converter
    17.
    发明授权

    公开(公告)号:US10014777B1

    公开(公告)日:2018-07-03

    申请号:US15672429

    申请日:2017-08-09

    CPC classification number: H02M3/1582

    Abstract: Disclosed examples include inverting buck-boost DC-DC converter circuits with a switching circuit to alternate between first and second buck mode phases for buck operation in a first mode, including connecting an inductor and a capacitor in series between an input node and a reference node to charge the inductor and the capacitor in the first buck mode phase, and connecting the inductor and the capacitor in parallel between an output node and the reference node to discharge the inductor and the capacitor to the output node. For boost operation in a second mode, the switching circuit alternates between connecting the inductor and the capacitor in series between the input node and the reference node to discharge the inductor and charge the capacitor in a first boost mode phase, and connecting the inductor between the input node and the reference node to charge the inductor and connecting the capacitor between the first output node and the reference node to discharge the capacitor to deliver power to the output node in a second boost mode phase.

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