Selective stopband avoidance in switching converter controller

    公开(公告)号:US11863069B2

    公开(公告)日:2024-01-02

    申请号:US17537802

    申请日:2021-11-30

    CPC classification number: H02M3/157 H02M1/0041

    Abstract: A switching converter controller includes: a stopband controller having a stopband controller input and a stopband controller output, the stopband controller is configured to provide stopband information at the stopband controller output responsive to a reference signal; a pulse-frequency modulation (PFM) controller having a first PFM controller input, a second PFM controller input and a PFM controller output, the first PFM controller input configured to receive a feedback error signal, the second PFM controller input coupled to the stopband controller output, and the PFM controller configured to selectively adjust a clock signal at the PFM controller output based on the feedback error signal and the stopband information; and a driver circuit having a driver circuit input coupled to the PFM controller output and configured to receive the clock signal, and having a driver circuit output adapted to be coupled to a power stage switch.

    Charge-pump for a gate driver of a switched DC/DC converter

    公开(公告)号:US11196339B1

    公开(公告)日:2021-12-07

    申请号:US17123195

    申请日:2020-12-16

    Abstract: A switching converter having a voltage input, a voltage output and a transistor connected between the voltage input and the voltage output, the switching converter including a control circuit comprising: a gate driver having an input, a first voltage supply input, a second voltage supply input and an output operable to be connected to a control terminal of the transistor; a bootstrap capacitor connected between the first voltage supply input and the second voltage supply input; and a charge pump having an input operable to be connected to the voltage input and an output connected to the first voltage supply input.

    Current sense circuit topology
    4.
    发明授权

    公开(公告)号:US11303210B2

    公开(公告)日:2022-04-12

    申请号:US16708066

    申请日:2019-12-09

    Abstract: Aspects of the present disclosure provide for a circuit. In at least some examples, the circuit includes a first switch coupled between a first node and a second node and a second switch coupled between a third node and the second node. The circuit further includes a resistor coupled between the second node and a fourth node and a capacitor comprising a first terminal coupled to the fourth node and a second terminal. The circuit further includes a transistor comprising a drain terminal coupled to the third node, a source terminal coupled to a fifth node, and a gate terminal and an amplifier comprising a first input terminal coupled to the fifth node, a second input terminal coupled to the fourth node, and an output terminal coupled to a sixth node.

    SEAMLESS DCM-PFM TRANSITION FOR SINGLE PULSE OPERATION IN DC-DC CONVERTERS

    公开(公告)号:US20210083583A1

    公开(公告)日:2021-03-18

    申请号:US17000854

    申请日:2020-08-24

    Abstract: A converter operable to convert an input voltage at an input node to an output voltage at an output node coupled to a load by switching on and off a transistor at a switching frequency, the converter comprising: an error amplifier circuit having a first input coupled to a reference voltage, a second input coupled to the output node through a resistive divider, a first output operable to output a control current and a second output operable to output a current equivalent to the control current; a peak current comparator circuit having a first input coupled to the second output of the error amplifier circuit, a second input and an output, the second input is coupled to the input node through an inductor; an off-time timer circuit having an input coupled to the first output of the error amplifier circuit and an output, the off-time timer circuit operable to set the switching frequency based on the control current; and a control circuit having a first input coupled to the output of the peak current comparator circuit, a second input coupled to the output of the off-time timer circuit and an output coupled to a control terminal of the transistor.

    Spectrum modulation for switching circuits

    公开(公告)号:US10020722B2

    公开(公告)日:2018-07-10

    申请号:US15294329

    申请日:2016-10-14

    CPC classification number: H02M1/44 H02M3/155 H04B1/69

    Abstract: A circuit includes a signal generator to generate an output signal to vary the switching frequency of a switching circuit to mitigate noise in the switching circuit. The signal generator includes a modulation waveform generator (MWG) to generate a ramp signal in response to a numerical input and a switching signal from the switching circuit. The ramp signal is employed to modulate the frequency of the output signal of the signal generator over a range of frequencies from a minimum frequency to a maximum frequency. A frequency adjuster circuit modulates the amplitude of the ramp signal by adjusting at least one of the minimum frequency or the maximum frequency of the range of frequencies.

    SELECTIVE STOPBAND AVOIDANCE IN SWITCHING CONVERTER CONTROLLER

    公开(公告)号:US20240022169A1

    公开(公告)日:2024-01-18

    申请号:US18374325

    申请日:2023-09-28

    CPC classification number: H02M3/157 H02M1/0041

    Abstract: A switching converter controller includes: a stopband controller having a stopband controller input and a stopband controller output, the stopband controller is configured to provide stopband information at the stopband controller output responsive to a reference signal; a pulse-frequency modulation (PFM) controller having a first PFM controller input, a second PFM controller input and a PFM controller output, the first PFM controller input configured to receive a feedback error signal, the second PFM controller input coupled to the stopband controller output, and the PFM controller configured to selectively adjust a clock signal at the PFM controller output based on the feedback error signal and the stopband information; and a driver circuit having a driver circuit input coupled to the PFM controller output and configured to receive the clock signal, and having a driver circuit output adapted to be coupled to a power stage switch.

    Seamless DCM-PFM transition for single pulse operation in DC-DC converters

    公开(公告)号:US11563378B2

    公开(公告)日:2023-01-24

    申请号:US17000854

    申请日:2020-08-24

    Abstract: A converter operable to convert an input voltage at an input node to an output voltage at an output node coupled to a load by switching on and off a transistor at a switching frequency, the converter comprising: an error amplifier circuit having a first input coupled to a reference voltage, a second input coupled to the output node through a resistive divider, a first output operable to output a control current and a second output operable to output a current equivalent to the control current; a peak current comparator circuit having a first input coupled to the second output of the error amplifier circuit, a second input and an output, the second input is coupled to the input node through an inductor; an off-time timer circuit having an input coupled to the first output of the error amplifier circuit and an output, the off-time timer circuit operable to set the switching frequency based on the control current; and a control circuit having a first input coupled to the output of the peak current comparator circuit, a second input coupled to the output of the off-time timer circuit and an output coupled to a control terminal of the transistor.

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