公开(公告)号：US12198982B2

公开(公告)日：2025-01-14

申请号：US17960568

申请日：2022-10-05

Applicant: Texas Instruments Incorporated

Inventor： Michael Todd Wyant ,  Dave Charles Stepniak ,  Matthew John Sherbin ,  Sada Hiroyuki ,  Shoichi Iriguchi ,  Genki Yano

IPC: H01L21/78 ,  H01L21/268 ,  H01L21/67 ,  H01L21/683 ,  H01L23/58

Abstract: In a described example, a method includes: applying a dicing tape over a metal layer covering a portion of a surface of scribe streets on a device side of a semiconductor wafer that includes semiconductor device dies formed thereon separated from one another by the scribe streets; and placing the semiconductor wafer with the device side facing away from a laser in a stealth dicing machine. A power of a laser beam is adjusted to a first power level. The laser beam is focused through the non-device side of the semiconductor wafer to a first focal depth in the metal layer. The laser beam scans across the scribe streets and ablates the metal layer in the scribe streets. The method continues by singulating the semiconductor device dies using stealth dicing along the scribe streets in the stealth dicing machine.

公开(公告)号：US11664276B2

公开(公告)日：2023-05-30

申请号：US16205692

申请日：2018-11-30

Applicant: Texas Instruments Incorporated

Inventor： Matthew John Sherbin ,  Michael Todd Wyant ,  Christopher Daniel Manack ,  Hiroyuki Sada ,  Shoichi Iriguchi ,  Genki Yano ,  Ming Zhu ,  Joseph O. Liu

IPC: H01L23/544 ,  H01L21/78 ,  B23K26/364 ,  H01L23/00 ,  H01L21/268

CPC classification number: H01L21/78 ,  B23K26/364 ,  H01L21/268 ,  H01L23/562

Abstract: A semiconductor die includes a substrate having a semiconductor surface layer bon a front side with active circuitry including at last one transistor therein and a back side. The sidewall edges of the semiconductor die have at least one damage region pair including an angled damage feature region relative to a surface normal of the semiconductor die that is above a damage region that is more normal to the surface normal of the die as compared to the angled damage feature region.

公开(公告)号：US11482442B2

公开(公告)日：2022-10-25

申请号：US17184553

申请日：2021-02-24

Applicant: Texas Instruments Incorporated

Inventor： Matthew John Sherbin ,  Michael Todd Wyant ,  Dave Charles Stepniak ,  Sada Hiroyuki ,  Shoichi Iriguchi ,  Genki Yano

IPC: H01L21/683 ,  H01L21/687

Abstract: A subring for holding tape connected to semiconductor dies and spanning a passage in a frame having a first diameter includes a base. An opening extends through the base and has a second diameter at least as large as the first diameter. A projection extends from the base to ends positioned on opposite sides of the base. The projection is adapted to clamp the tape to the frame and adapted to prevent relative movement between the tape, the subring, and the frame.

公开(公告)号：US20210183683A1

公开(公告)日：2021-06-17

申请号：US17184553

申请日：2021-02-24

Applicant: Texas Instruments Incorporated

Inventor： Matthew John Sherbin ,  Michael Todd Wyant ,  Dave Charles Stepniak ,  Sada Hiroyuki ,  Shoichi Iriguchi ,  Genki Yano

IPC: H01L21/683 ,  H01L21/687

Abstract: A subring for holding tape connected to semiconductor dies and spanning a passage in a frame having a first diameter includes a base. An opening extends through the base and has a second diameter at least as large as the first diameter. A projection extends from the base to ends positioned on opposite sides of the base. The projection is adapted to clamp the tape to the frame and adapted to prevent relative movement between the tape, the subring, and the frame.

公开(公告)号：US10431684B2

公开(公告)日：2019-10-01

申请号：US15136097

申请日：2016-04-22

Applicant: Texas Instruments Incorporated

Inventor： Steven Kummerl ,  Matthew John Sherbin ,  Saumya Gandhi

IPC: H01L29/78 ,  H01L21/268 ,  H01L21/324 ,  H01L21/78 ,  H01L29/04 ,  H01L29/16

Abstract: A method to improve transistor performance uses a wafer (100) of single-crystalline semiconductor with a first zone (102) of field effect transistors (FETs) and circuitry at the wafer surface, and an infrared (IR) laser with a lens for focusing the IR light to a second depth (112) farther from the wafer surface than the first depth of the first zone. The focused laser beam is moved parallel to the surface across the wafer to cause local multi-photon absorption at the second depth for transforming the single-crystalline semiconductor into a second zone (111) of polycrystalline semiconductor with high density of dislocations. The second zone has a height and lateral extensions, and permanently stresses the single-crystalline bulk semiconductor; the stress increases the majority carrier mobility in the channel of the FETs, improving the transistor performance.

公开(公告)号：US20170309748A1

公开(公告)日：2017-10-26

申请号：US15136097

申请日：2016-04-22

Applicant: Texas Instruments Incorporated

Inventor： Steven Kummerl ,  Matthew John Sherbin ,  Saumya Gandhi

IPC: H01L29/78 ,  H01L21/78 ,  H01L21/268 ,  H01L21/324 ,  H01L29/16 ,  H01L29/04

CPC classification number: H01L29/7849 ,  H01L21/268 ,  H01L21/324 ,  H01L21/78 ,  H01L29/04 ,  H01L29/16

Abstract: A method to improve transistor performance uses a wafer (100) of single-crystalline semiconductor with a first zone (102) of field effect transistors (FETs) and circuitry at the wafer surface, and an infrared (IR) laser with a lens for focusing the IR light to a second depth (112) farther from the wafer surface than the first depth of the first zone. The focused laser beam is moved parallel to the surface across the wafer to cause local multi-photon absorption at the second depth for transforming the single-crystalline semiconductor into a second zone (111) of polycrystalline semiconductor with high density of dislocations. The second zone has a height and lateral extensions, and permanently stresses the single-crystalline bulk semiconductor; the stress increases the majority carrier mobility in the channel of the FETs, improving the transistor performance.