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公开(公告)号：US11115044B2
公开(公告)日：2021-09-07
申请号：US16911702
申请日：2020-06-25
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Meghna Agrawal
Abstract: A delta-sigma modulator includes a first integrator and a comparator. The comparator's positive input couples to the first integrator's positive output, and the comparator's negative input couples to the first integrator's negative output. A first current DAC comprises a current source device, and first and second transistors. The first transistor has a first transistor control input and first and second current terminals. The first current terminal couples to the current source device, and the second current terminal couples to the first integrator positive output. The second transistor has a second transistor control input and third and fourth current terminals. The third current terminal couples to the current source device, and the fourth current terminal couples to the first integrator negative output. A first capacitive device couples to the second transistor control input and to both the second current terminal and the first integrator positive output.
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Patent Agency Ranking
公开(公告)号：US20200350871A1
公开(公告)日：2020-11-05
申请号：US16934300
申请日：2020-07-21
Applicant: Texas Instruments Incorporated
Inventor： Meghna Agrawal
Abstract: An apparatus to prevent supply-to-ground current in a comparator is disclosed. The apparatus includes circuitry to determine if first and second output nodes of the comparator have respectively reached first and second logic levels, and circuitry responsive to a determination that the voltage at the first and second output nodes of the comparator has reached the first and second logic levels, to generate a signal. In addition, the apparatus includes circuitry to supply the signal to a transistor, the signal to turn off the transistor and prevent the flow of supply-to-ground current through the comparator.
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公开(公告)号：US20190207562A1
公开(公告)日：2019-07-04
申请号：US15858141
申请日：2017-12-29
Applicant: Texas Instruments Incorporated
Inventor： Meghna Agrawal
Abstract: An apparatus to prevent supply-to-ground current in a comparator is disclosed. The apparatus includes circuitry to determine if first and second output nodes of the comparator have respectively reached first and second logic levels, and circuitry responsive to a determination that the voltage at the first and second output nodes of the comparator has reached the first and second logic levels, to generate a signal. In addition, the apparatus includes circuitry to supply the signal to a transistor, the signal to turn off the transistor and prevent the flow of supply-to-ground current through the comparator.
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公开(公告)号：US10727859B1
公开(公告)日：2020-07-28
申请号：US16583510
申请日：2019-09-26
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Meghna Agrawal
Abstract: A delta-sigma modulator includes a first integrator and a comparator. The comparator's positive input couples to the first integrator's positive output, and the comparator's negative input couples to the first integrator's negative output. A first current DAC comprises a current source device, and first and second transistors. The first transistor has a first transistor control input and first and second current terminals. The first current terminal couples to the current source device, and the second current terminal couples to the first integrator positive output. The second transistor has a second transistor control input and third and fourth current terminals. The third current terminal couples to the current source device, and the fourth current terminal couples to the first integrator negative output. A first capacitive device couples to the second transistor control input and to both the second current terminal and the first integrator positive output.
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公开(公告)号：US11929765B2
公开(公告)日：2024-03-12
申请号：US17380356
申请日：2021-07-20
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Meghna Agrawal
Abstract: A delta-sigma modulator includes a first integrator and a comparator. The comparator's positive input couples to the first integrator's positive output, and the comparator's negative input couples to the first integrator's negative output. A first current DAC comprises a current source device, and first and second transistors. The first transistor has a first transistor control input and first and second current terminals. The first current terminal couples to the current source device, and the second current terminal couples to the first integrator positive output. The second transistor has a second transistor control input and third and fourth current terminals. The third current terminal couples to the current source device, and the fourth current terminal couples to the first integrator negative output. A first capacitive device couples to the second transistor control input and to both the second current terminal and the first integrator positive output.
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公开(公告)号：US10965310B1
公开(公告)日：2021-03-30
申请号：US16884902
申请日：2020-05-27
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Meghna Agrawal
Abstract: A circuit includes a transconductance stage having first and second outputs. The circuit also includes a comparator having first and second inputs. The first input is coupled to the first output, and the second input is coupled to the second output. The comparator includes first through fifth transistors and a pair of cross-coupled transistors. The pair of cross-coupled transistors is coupled to the second current terminals of the first and second transistors. The second current terminal of the third transistor is coupled to the second current terminal of the first transistor, and the first current terminals of the first, second, and third transistors are coupled together. The second current terminals of the fourth and fifth transistors are coupled together and to the control input of the third transistor.
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