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公开(公告)号：US20210083565A1
公开(公告)日：2021-03-18
申请号：US17108028
申请日：2020-12-01
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Srinivas Venkata Veeramreddi , Subhash Sahni
Abstract: A switch-mode power supply and a zero current detector for use therein. A zero current detector includes an input stage and an output stage. The output stage is coupled to the input stage. The output stage includes a detector output terminal, a first transistor, and a second transistor. The first transistor includes an input terminal and a control terminal. The input terminal is coupled to the detector output terminal. The control terminal is coupled to the input stage. The second transistor includes an input terminal, a control terminal, and an output terminal. The input terminal is coupled to the control terminal of the first transistor. The control terminal is coupled to the input terminal of the second transistor. The output terminal is coupled to ground.
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公开(公告)号：US10855164B2
公开(公告)日：2020-12-01
申请号：US16122953
申请日：2018-09-06
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Srinivas Venkata Veeramreddi , Subhash Sahni
Abstract: A switch-mode power supply and a zero current detector for use therein. A zero current detector includes an input stage and an output stage. The output stage is coupled to the input stage. The output stage includes a detector output terminal, a first transistor, and a second transistor. The first transistor includes an input terminal and a control terminal. The input terminal is coupled to the detector output terminal. The control terminal is coupled to the input stage. The second transistor includes an input terminal, a control terminal, and an output terminal. The input terminal is coupled to the control terminal of the first transistor. The control terminal is coupled to the input terminal of the second transistor. The output terminal is coupled to ground.
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公开(公告)号：US20200274447A1
公开(公告)日：2020-08-27
申请号：US16806010
申请日：2020-03-02
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Srinivas Venkata Veeramreddi , Sudhir Polarouthu
IPC: H02M3/158
Abstract: In an embodiment, a circuit includes a Direct Current (DC)-DC buck-boost converter and a controller. The controller includes an error amplifier configured to receive a feedback signal responsive to an output signal of the buck-boost converter. The error amplifier is configured to compare the feedback signal and a reference signal to generate an error signal. The controller includes a modulator circuit that is configured to receive the error signal and compare the error signal with a periodic ramp signal to generate a modulated signal. The controller further includes a digital logic block to generate switching signals in response to the modulated signal that is fed to the buck-boost converter to control the output signal of the buck-boost converter. The controller includes a capacitance multiplier circuit coupled to the output of the error amplifier to configure a dominant pole so as to compensate the buck-boost converter.
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公开(公告)号：US12261520B2
公开(公告)日：2025-03-25
申请号：US18171752
申请日：2023-02-21
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Srinivas Venkata Veeramreddi , Subhash Sahni
Abstract: A switch-mode power supply and a zero current detector for use therein. A zero current detector includes an input stage and an output stage. The output stage is coupled to the input stage. The output stage includes a detector output terminal, a first transistor, and a second transistor. The first transistor includes an input terminal and a control terminal. The input terminal is coupled to the detector output terminal. The control terminal is coupled to the input stage. The second transistor includes an input terminal, a control terminal, and an output terminal. The input terminal is coupled to the control terminal of the first transistor. The control terminal is coupled to the input terminal of the second transistor. The output terminal is coupled to ground.
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公开(公告)号：US11206051B2
公开(公告)日：2021-12-21
申请号：US16896557
申请日：2020-06-09
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Debapriya Sahu , Srinivas Venkata Veeramreddi , Raghu Ganesan
Abstract: A device includes a frequency multiplier circuit to receive a base frequency signal, multiply the base frequency signal, and output the multiple of the base frequency signal, and includes an offset frequency generator, including at least one logic gate, to receive the multiple of the base frequency signal and output an offset frequency signal from the at least one logic gate combination. A mixing circuit receives the offset frequency signal and a digital data signal, converts the digital data signal into an analog representation of the digital data signal, and mixes the offset frequency signal and the analog representation of the digital data signal to produce a mixed signal. The device yet further includes a power amplifier to amplify the mixed signal and output the amplified mixed signal as an output frequency signal of the device.
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Patent Agency Ranking
公开(公告)号：US20210314018A1
公开(公告)日：2021-10-07
申请号：US17348817
申请日：2021-06-16
Applicant: Texas Instruments Incorporated
Inventor： Debapriya Sahu , Rohit Chatterjee , Srinivas Venkata Veeramreddi
Abstract: A wireless transceiver. The transceiver includes: (i) a transmit signal path; (ii) a calibration path, comprising a conductor to connect a calibration tone into the transmit signal path; (iii) a receive signal path, comprising a first data signal path to process a first data and a second data signal path, different than the first data signal path, to process a second data; (iv) a first capacitive coupling to couple a response to the calibration tone from the transmit signal path to the first data signal path; and (v) a second capacitive coupling to couple a response to the calibration tone from the transmit signal path to the second data signal path.
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公开(公告)号：US11070242B2
公开(公告)日：2021-07-20
申请号：US16404598
申请日：2019-05-06
Applicant: Texas Instruments Incorporated
Inventor： Debapriya Sahu , Rohit Chatterjee , Srinivas Venkata Veeramreddi
Abstract: A wireless transceiver. The transceiver includes: (i) a transmit signal path; (ii) a calibration path, comprising a conductor to connect a calibration tone into the transmit signal path; (iii) a receive signal path, comprising a first data signal path to process a first data and a second data signal path, different than the first data signal path, to process a second data; (iv) a first capacitive coupling to couple a response to the calibration tone from the transmit signal path to the first data signal path; and (v) a second capacitive coupling to couple a response to the calibration tone from the transmit signal path to the second data signal path.
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公开(公告)号：US10581326B2
公开(公告)日：2020-03-03
申请号：US14070191
申请日：2013-11-01
Applicant: Texas Instruments Incorporated
Inventor： Srinivas Venkata Veeramreddi , Sudhir Polarouthu
IPC: H02M3/158
Abstract: In an embodiment, a circuit includes a Direct Current (DC)-DC buck-boost converter and a controller. The controller includes an error amplifier configured to receive a feedback signal responsive to an output signal of the buck-boost converter. The error amplifier is configured to compare the feedback signal and a reference signal to generate an error signal. The controller includes a modulator circuit that is configured to receive the error signal and compare the error signal with a periodic ramp signal to generate a modulated signal. The controller further includes a digital logic block to generate switching signals in response to the modulated signal that is fed to the buck-boost converter to control the output signal of the buck-boost converter. The controller includes a capacitance multiplier circuit coupled to the output of the error amplifier to configure a dominant pole so as to compensate the buck-boost converter.
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19.发明申请Systems and Methods of Tone Management in Hysteretic Mode DC to DC Converter 有权滞后模式DC-DC转换器的音频管理系统与方法公开(公告)号：US20140097810A1
公开(公告)日：2014-04-10
申请号：US13647156
申请日：2012-10-08
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Harikrishna Parthasarathy , Srinivas Venkata Veeramreddi , Sudhir Polarouthu , Baher S. Haroun
IPC: H02J1/02
CPC classification number: H02M3/1563
Abstract: As disclosed herein, two hysteresis levels, a high level a low level, may be used to set a period (and the switching frequency) of the output voltage of a DC-DC converter, as well as the output ripple of the converter. These two thresholds may be changed using a set of switches. By controlling the sequence and the duration of the on-time of the switches, spectral spurs in the output can be controlled and the amplitude and the frequency band of interest can be reduced. Additional spur reduction may be possible by randomizing the control of the switches.
Abstract translation: 如本文所公开的，可以使用两个滞后电平（高电平低电平）来设置DC-DC转换器的输出电压的周期（和开关频率）以及转换器的输出纹波。 这两个阈值可以使用一组开关来改变。 通过控制开关的导通时间的顺序和持续时间，可以控制输出中的频谱杂散，并且可以减小感兴趣的幅度和频带。 通过对开关的控制进行随机化，可以实现额外的齿间减少。
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公开(公告)号：US20240380428A1
公开(公告)日：2024-11-14
申请号：US18783793
申请日：2024-07-25
Applicant: Texas Instruments Incorporated
Inventor： Debapriya Sahu , Rohit Chatterjee , Srinivas Venkata Veeramreddi
Abstract: A wireless transceiver. The transceiver includes: (i) a transmit signal path; (ii) a calibration path, comprising a conductor to connect a calibration tone into the transmit signal path; (iii) a receive signal path, comprising a first data signal path to process a first data and a second data signal path, different than the first data signal path, to process a second data; (iv) a first capacitive coupling to couple a response to the calibration tone from the transmit signal path to the first data signal path; and (v) a second capacitive coupling to couple a response to the calibration tone from the transmit signal path to the second data signal path.
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