公开(公告)号：US20150028943A1

公开(公告)日：2015-01-29

申请号：US14445980

申请日：2014-07-29

Applicant: Texas Instruments Incorporated

Inventor： Sureshkumar Govindaraj ,  Jose L. Flores

IPC: H02M3/158 ,  H03K17/687 ,  H03K17/284

CPC classification number: H03K19/0016 ,  G06F1/26 ,  G06F1/3287 ,  H03K17/164 ,  Y02D10/171

Abstract: Traditionally, designs have been very conservative on power grid design using higher margins than those needed for safe operation. This is especially true for process driver designs which may not have enough data on process characteristics. This invention allows us to recoup these inefficiencies and to speed up the power up/power down dynamically. This invention sequences plural power supply switches serially or in plural parallel sets as set by a wake up mode.

Abstract translation: 传统上，电力设计的设计在使用比安全运行所需要的更高的利润率方面非常保守。 对于可能没有足够的过程特性数据的过程驱动程序设计尤其如此。 本发明允许我们回收这些低效率并且动态地加速上电/断电。 本发明按照唤醒模式设置串行或多个并行集合中的多个电源开关。

公开(公告)号：US20240338325A1

公开(公告)日：2024-10-10

申请号：US18744992

申请日：2024-06-17

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sureshkumar Govindaraj

IPC: G06F12/123 ,  G06F12/06

CPC classification number: G06F12/123 ,  G06F12/0646 ,  G06F2212/1044 ,  G06F2212/608

Abstract: A method is provided that includes searching tags in a tag group comprised in a tagged memory system for an available tag line during a clock cycle, wherein the tagged memory system includes a plurality of tag lines having respective tags and wherein the tags are divided into a plurality of non-overlapping tag groups, and searching tags in a next tag group of the plurality of tag groups for an available tag line during a next clock cycle when the searching in the tag group does not find an available tag line.

公开(公告)号：US11500784B2

公开(公告)日：2022-11-15

申请号：US17394018

申请日：2021-08-04

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sureshkumar Govindaraj

IPC: G06F12/123 ,  G06F12/06

Abstract: A method is provided that includes searching tags in a tag group comprised in a tagged memory system for an available tag line during a clock cycle, wherein the tagged memory system includes a plurality of tag lines having respective tags and wherein the tags are divided into a plurality of non-overlapping tag groups, and searching tags in a next tag group of the plurality of tag groups for an available tag line during a next clock cycle when the searching in the tag group does not find an available tag line.

公开(公告)号：US20180341616A1

公开(公告)日：2018-11-29

申请号：US15602235

申请日：2017-05-23

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Dheera Balasubramanian ,  Joseph Zbiciak ,  Sureshkumar Govindaraj

IPC: G06F13/42 ,  G06F9/30 ,  G06F9/38 ,  G06F15/78 ,  G06F12/0875

Abstract: A multilayer butterfly network is shown that is operable to transform and align a plurality of fields from an input to an output data stream. Many transformations are possible with such a network which may include separate control of each multiplexer. This invention supports a limited set of multiplexer control signals, which enables a similarly limited set of data transformations. This limited capability is offset by the reduced complexity of the multiplexor control circuits. This invention used precalculated inputs and simple combinatorial logic to generate control signals for the butterfly network. Controls are independent for each layer and therefore are dependent only on the input and output patterns. Controls for the layers can be calculated in parallel.

公开(公告)号：US10140239B1

公开(公告)日：2018-11-27

申请号：US15602235

申请日：2017-05-23

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Dheera Balasubramanian ,  Joseph Zbiciak ,  Sureshkumar Govindaraj

IPC: G06F13/42 ,  G06F9/30 ,  G06F9/38 ,  G06F15/78 ,  G06F12/0875 ,  H04N19/423

CPC classification number: G06F13/42 ,  G06F9/30145 ,  G06F9/3802 ,  G06F12/0875 ,  G06F15/7807 ,  G06F2212/452 ,  H04N19/423

Abstract: A multilayer butterfly network is shown that is operable to transform and align a plurality of fields from an input to an output data stream. Many transformations are possible with such a network which may include separate control of each multiplexer. This invention supports a limited set of multiplexer control signals, which enables a similarly limited set of data transformations. This limited capability is offset by the reduced complexity of the multiplexor control circuits. This invention used precalculated inputs and simple combinatorial logic to generate control signals for the butterfly network. Controls are independent for each layer and therefore are dependent only on the input and output patterns. Controls for the layers can be calculated in parallel.