Automatic frequency oscillator for pulse-regulated switch-mode power supply

    公开(公告)号:US11271479B2

    公开(公告)日:2022-03-08

    申请号:US16731404

    申请日:2019-12-31

    Inventor: Tawen Mei

    Abstract: In some examples, a switch-mode power supply circuit comprises a pulse generation circuit comprising an oscillator, the oscillator configured to generate first pulses using a fixed frequency regulation for a first load condition that exceeds a predefined threshold and configured to generate second pulses using a variable frequency regulation for a second load condition that does not exceed the predefined threshold. The circuit also includes a power converter coupled to the pulse generation circuit and configured to convert a first voltage to a regulated voltage using either one of the first or second pulses generated by the pulse generation circuit. The circuit further comprises an output filter coupled to the power converter and configured to produce a second voltage from the regulated voltage.

    RECOVERY CONTROL FOR POWER CONVERTER

    公开(公告)号:US20220029590A1

    公开(公告)日:2022-01-27

    申请号:US17498259

    申请日:2021-10-11

    Abstract: A device includes a first amplifier and a second amplifier. The first amplifier includes an inverting input configured to be coupled to a feedback node of an output of a power converter, a first non-inverting input configured to couple to a first voltage node, a second non-inverting input, and an output. The second amplifier includes an inverting input coupled to the output of the first amplifier, a non-inverting input coupled to a second voltage node, and an output. The device also includes a first transistor coupled to the output of the first amplifier and having a control terminal coupled to the output of the second amplifier, a capacitor coupled to a ground node and to the second non-inverting input of the first amplifier, and a current node coupled to the capacitor.

    DUAL MODE SWITCHING REGULATOR WITH PWM/PFM FREQUENCY CONTROL

    公开(公告)号:US20200274445A1

    公开(公告)日:2020-08-27

    申请号:US16745028

    申请日:2020-01-16

    Abstract: A dual mode switching regulator includes a PWM/PFM control architecture with PFM frequency foldback based on extending switching cycle off time TOFF. A controller includes a PWM/PFM clock generator that, in response to assertion of a TOFF control signal, extends the nominal PWM switching cycle off-time TOFFnom for an extended off-time TOFFext (variable), so that switching cycle off-time is [TOFFnom+TOFFext]. A TOFF modulator generates the TOFF control signal based on generating a TOFF control voltage from an ITOFF control current equal to [IPWM-IPFM], generated by sourcing an IPWM reference current, and, in response to a PFM load condition, sinking an IPFM control current. The TOFF control signal is asserted when the TOFF control voltage is not substantially equal to a TOFF reference voltage at the end of TOFFnom, to cause the PWM/PFM clock generator to extend switching cycle off-time to [TOFFnom+TOFFext], with the duration of TOFFext determining PFM switching frequency.

    Startup circuit for high voltage low power voltage regulator

    公开(公告)号:US12001235B2

    公开(公告)日:2024-06-04

    申请号:US17708278

    申请日:2022-03-30

    Inventor: Tawen Mei

    CPC classification number: G05F3/30

    Abstract: Described embodiments include a circuit for voltage regulator startup. The circuit includes a voltage regulation circuit having first and second regulator inputs and a regulator output. A startup circuit has a startup input coupled to the first regulator input, and a startup output. A reference generation circuit has first and second reference inputs and first and second reference outputs. The first reference input is coupled to the regulator output. The second reference input is coupled to the startup output, and the first reference output is coupled to a reference output terminal and to the second regulator input. A reference detection circuit has a first detection input coupled to the regulator output, and a second detection input coupled to the second reference output, and provides a reference ready signal responsive to a reference voltage being within a reference specification.

    Multiphase switched mode power supply clocking circuits and related methods

    公开(公告)号:US11777406B2

    公开(公告)日:2023-10-03

    申请号:US17572062

    申请日:2022-01-10

    CPC classification number: H02M3/1582 H02M3/33507 H04L7/0079

    Abstract: Multiphase switched mode power supply clock apparatus, systems, articles of manufacture, and related methods are disclosed. An example apparatus includes a first clock recovery circuit to in response to obtaining a first clock pulse, transmit the first clock pulse to a power converter to cause the power converter to switch based on the first clock pulse, in response to obtaining a second clock pulse after the first clock pulse re-transmit the second clock pulse to a second clock recovery circuit, and increment a count value, and in response to the count value meeting a phase selection value, reset the count value.

    PULSE FREQUENCY MODULATOR FOR SWITCHED MODE POWER SUPPLY

    公开(公告)号:US20230275573A1

    公开(公告)日:2023-08-31

    申请号:US17682764

    申请日:2022-02-28

    Inventor: Tawen Mei

    CPC classification number: H03K7/06 H02M3/158 H03K4/00

    Abstract: In some examples, an apparatus comprises: an amplifier having an amplifier output and first and second amplifier inputs, the first amplifier input coupled to a reference voltage terminal, and the second amplifier input coupled to a power input terminal; a ramp generation circuit having a reset input and a ramp output; a comparator having a comparator output and first and second comparator inputs, the first comparator input coupled to the amplifier output, and the second comparator input coupled to the ramp output; and a switching signal generation circuit having a circuit input and a circuit output, the circuit input coupled to the comparator output, and the circuit output coupled to a power control terminal.

    Switch mode regulator with slew rate control

    公开(公告)号:US11588480B2

    公开(公告)日:2023-02-21

    申请号:US17114793

    申请日:2020-12-08

    Inventor: Tawen Mei

    Abstract: A circuit is configured to drive a switch mode regulator and to control the slew rate at a switching terminal of the regulator. The circuit includes first and second transistors coupled between a voltage supply terminal and a switching terminal, and includes third and fourth transistors coupled between the voltage supply terminal and the switching terminal. The circuit includes a fifth transistor coupled to the fourth transistor in a current mirror configuration and a sixth transistor coupled between the voltage supply terminal and the third transistor. The circuit includes a first resistor coupled between the voltage supply terminal and the fifth transistor, and includes a second resistor coupled between the sixth transistor and the second transistor.

    LOW POWER SWITCHING MODE REGULATOR HAVING AUTOMATIC PFM AND PWM OPERATION
    18.
    发明申请
    LOW POWER SWITCHING MODE REGULATOR HAVING AUTOMATIC PFM AND PWM OPERATION 有权
    具有自动PFM和PWM操作的低功率开​​关模式调节器

    公开(公告)号:US20150035511A1

    公开(公告)日:2015-02-05

    申请号:US14333241

    申请日:2014-07-16

    Inventor: Tawen Mei

    CPC classification number: H02M3/156 H02M3/1563

    Abstract: A circuit and method for operating a switching mode power supply. A clock is driven by a current source to generate pulses at a fixed frequency using pulse width modulation for normal load demands. For light load demands, the current to the clock is reduced, and therefore the clock generates pulses at a lower, variable frequency and fixed duration using pulse frequency modulation. Thus, depending on the load condition, either fixed frequency pulses or fixed duration pulses are automatically provided to a power stage for conversion to an output voltage.

    Abstract translation: 一种用于操作开关模式电源的电路和方法。 时钟由电流源驱动,以便在正常负载需求下使用脉冲宽度调制以固定频率产生脉冲。 对于轻负载要求,时钟电流降低,因此时钟使用脉冲频率调制在较低,可变频率和固定持续时间内产生脉冲。 因此,根据负载条件,固定频率脉冲或固定持续时间脉冲自动提供给功率级以转换为输出电压。

    APPARATUS TO CHARGE BOOTSTRAP CAPACITOR

    公开(公告)号:US20250112637A1

    公开(公告)日:2025-04-03

    申请号:US18477979

    申请日:2023-09-29

    Inventor: Tawen Mei

    Abstract: In some aspects, an integrated circuit comprises an input voltage terminal, a capacitor terminal, a first NMOS transistor connected to the input voltage terminal, a first PMOS transistor connected to a first NMOS gate terminal of the first NMOS transistor and connected to the capacitor terminal, the first PMOS transistor having a first PMOS gate terminal, a second PMOS transistor connected to the first NMOS gate terminal of the first NMOS transistor, the second PMOS transistor having a second PMOS gate terminal, a switched output terminal, a second NMOS transistor connected to the switched output terminal, a third NMOS transistor connected to the switched output terminal, an inverter, and a complementary metal oxide semiconductor (CMOS) transistor pair, the CMOS transistor pair having an input connected to the third NMOS transistor and an output connected to a second PMOS gate terminal of the second PMOS transistor.

    Pulse frequency modulator for switched mode power supply

    公开(公告)号:US12231028B2

    公开(公告)日:2025-02-18

    申请号:US17682764

    申请日:2022-02-28

    Inventor: Tawen Mei

    Abstract: In some examples, an apparatus comprises: an amplifier having an amplifier output and first and second amplifier inputs, the first amplifier input coupled to a reference voltage terminal, and the second amplifier input coupled to a power input terminal; a ramp generation circuit having a reset input and a ramp output; a comparator having a comparator output and first and second comparator inputs, the first comparator input coupled to the amplifier output, and the second comparator input coupled to the ramp output; and a switching signal generation circuit having a circuit input and a circuit output, the circuit input coupled to the comparator output, and the circuit output coupled to a power control terminal.

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