公开(公告)号：US20160315191A1

公开(公告)日：2016-10-27

申请号：US14853839

申请日：2015-09-14

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chun-Hsiung TSAI ,  Kuo-Feng YU ,  Kei-Wei CHEN

IPC: H01L29/78 ,  H01L21/8234 ,  H01L21/225 ,  H01L21/223 ,  H01L21/324 ,  H01L27/088 ,  H01L29/66

CPC classification number: H01L29/7834 ,  H01L21/2236 ,  H01L21/2254 ,  H01L21/31155 ,  H01L21/324 ,  H01L21/823814 ,  H01L21/823821 ,  H01L27/0924 ,  H01L29/66492 ,  H01L29/66803

Abstract: A semiconductor structure includes a substrate, a first semiconductor fin, a second semiconductor fin, and a first lightly-doped drain (LDD) region. The first semiconductor fin is disposed on the substrate. The first semiconductor fin has a top surface and sidewalls. The second semiconductor fin is disposed on the substrate. The first semiconductor fin and the second semiconductor fin are separated from each other at a nanoscale distance. The first lightly-doped drain (LDD) region is disposed at least in the top surface and the sidewalls of the first semiconductor fin.

Abstract translation: 半导体结构包括衬底，第一半导体鳍片，第二半导体鳍片和第一轻掺杂漏极（LDD）区域。 第一半导体鳍片设置在基板上。 第一半导体鳍具有顶表面和侧壁。 第二半导体翅片设置在基板上。 第一半导体鳍片和第二半导体鳍片以纳米级距离彼此分离。 第一轻掺杂漏极（LDD）区域至少设置在第一半导体鳍片的顶表面和侧壁中。

公开(公告)号：US20150228791A1

公开(公告)日：2015-08-13

申请号：US14697656

申请日：2015-04-28

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Wei-Yang LEE ,  Yuan-Ching PENG ,  Chun-Hsiung TSAI

IPC: H01L29/78 ,  H01L21/02 ,  H01L29/66 ,  H01L21/306 ,  H01L29/161 ,  H01L29/165

CPC classification number: H01L29/7848 ,  H01L21/02532 ,  H01L21/30604 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66431 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/78

Abstract: A semiconductor substructure with improved performance and a method of forming the same is described. In one embodiment, the semiconductor substructure includes a substrate, having an upper surface; a gate structure formed over the substrate; a spacer formed along a sidewall of the gate structure; and a source/drain structure disposed adjacent the gate structure. The source/drain structures is formed of a strain material and is disposed in an recess that extends below the upper surface of the substrate. An interface between the spacer and the source-drain structure can be at least 2 nm above the upper surface of the substrate.

Abstract translation: 描述了具有改进性能的半导体子结构及其形成方法。 在一个实施例中，半导体子结构包括具有上表面的基板; 形成在所述基板上的栅极结构; 沿所述栅极结构的侧壁形成的间隔物; 以及邻近栅极结构设置的源极/漏极结构。 源极/漏极结构由应变材料形成，并且设置在在衬底的上表面下方延伸的凹部中。 间隔物和源极 - 漏极结构之间的界面可以在衬底的上表面上方至少2nm。

公开(公告)号：US20140197455A1

公开(公告)日：2014-07-17

申请号：US13739010

申请日：2013-01-11

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Wei-Yang LEE ,  Yuan-Ching PENG ,  Chun-Hsiung TSAI

IPC: H01L29/78 ,  H01L29/66

CPC classification number: H01L29/7848 ,  H01L21/02532 ,  H01L21/30604 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66431 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/78

Abstract: A semiconductor substructure with improved performance and a method of forming the same is described. In one embodiment, the semiconductor substructure includes a substrate, having an upper surface; a gate structure formed over the substrate; a spacer formed along a sidewall of the gate structure; and a source/drain structure disposed adjacent the gate structure. The source/drain structures is formed of a strain material and is disposed in an recess that extends below the upper surface of the substrate. An interface between the spacer and the source-drain structure can be at least 2 nm above the upper surface of the substrate.

Abstract translation: 描述了具有改进性能的半导体子结构及其形成方法。 在一个实施例中，半导体子结构包括具有上表面的基板; 形成在所述基板上的栅极结构; 沿所述栅极结构的侧壁形成的间隔物; 以及邻近栅极结构设置的源极/漏极结构。 源极/漏极结构由应变材料形成，并且设置在在衬底的上表面下方延伸的凹部中。 间隔物和源极 - 漏极结构之间的界面可以在衬底的上表面上方至少2nm。