公开(公告)号：US20220316861A1

公开(公告)日：2022-10-06

申请号：US17846910

申请日：2022-06-22

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chih Hung CHEN ,  Kei-Wei CHEN ,  Te-Ming KUNG

IPC分类号： G01B11/06 ,  G01Q60/24

摘要： A method of evaluating a thickness of a film on a substrate includes detecting atomic force responses of the film to exposure of electromagnetic radiation in the infrared portion of the electromagnetic spectrum. The use of atomic force microscopy to evaluate thicknesses of thin films avoids underlayer noise commonly encountered when optical metrology techniques are utilized to evaluate film thicknesses. Such underlayer noise adversely impacts the accuracy of the thickness evaluation.

公开(公告)号：US20200040221A1

公开(公告)日：2020-02-06

申请号：US16503255

申请日：2019-07-03

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Fang-I CHIH ,  Chih-Chieh CHANG ,  Hui-Chi HUANG ,  Kei-Wei CHEN

IPC分类号： C09G1/02 ,  B24B37/20

摘要： A polishing composition for a chemical mechanical polishing process includes abrasive particles, at least one chemical additive, and a non-aqueous solvent.

公开(公告)号：US20190109213A1

公开(公告)日：2019-04-11

申请号：US16201388

申请日：2018-11-27

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Chun-Hsiung TSAI ,  Kei-Wei CHEN

IPC分类号： H01L29/66 ,  H01L29/165 ,  H01L29/78 ,  H01L29/08

摘要： A structure includes a semiconductor substrate, a source epitaxial structure, a drain epitaxial structure, and a gate stack. The source epitaxial structure is in the semiconductor substrate. The source epitaxial structure has a top surface, and the top surface of the source epitaxial structure comprises hydrogen. The drain epitaxial structure is in the semiconductor substrate. The gate stack is over the semiconductor substrate and between the source epitaxial structure and the drain epitaxial structure.

公开(公告)号：US20160336412A1

公开(公告)日：2016-11-17

申请号：US14842680

申请日：2015-09-01

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Chi-Cheng HUNG ,  Kei-Wei CHEN ,  Yu-Sheng WANG ,  Ming-Ching CHUNG ,  Chia-Yang WU

IPC分类号： H01L29/417 ,  H01L21/768 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L29/41725 ,  H01L21/28518 ,  H01L21/76805 ,  H01L21/76831 ,  H01L21/76843 ,  H01L21/76855 ,  H01L23/485 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/7834 ,  H01L29/7848

摘要： A semiconductor structure includes a semiconductor substrate, at least one dielectric layer, a dielectric spacer liner (DSL) layer, and at least one conductor. The dielectric layer is present on the semiconductor substrate. The dielectric layer has at least one contact hole exposing at least a portion of the semiconductor substrate. The semiconductor substrate has at least one recess communicating with the contact hole. The recess has a bottom surface and at least one sidewall. The DSL layer is present on at least the sidewall of the recess. The conductor is present at least partially in the contact hole and is electrically connected to the semiconductor substrate.

摘要翻译： 半导体结构包括半导体衬底，至少一个电介质层，介电间隔衬垫（DSL）层和至少一个导体。 电介质层存在于半导体衬底上。 电介质层具有暴露半导体衬底的至少一部分的至少一个接触孔。 半导体衬底具有与接触孔连通的至少一个凹部。 凹部具有底表面和至少一个侧壁。 DSL层至少存在于凹槽的侧壁上。 导体至少部分地存在于接触孔中，并与半导体衬底电连接。

公开(公告)号：US20210371774A1

公开(公告)日：2021-12-02

申请号：US17191534

申请日：2021-03-03

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Ji CUI ,  William Weilun HONG ,  Gin-Chen HUANG ,  Shich-Chang SUEN ,  Kei-Wei CHEN

IPC分类号： C11D1/40 ,  H01L29/66 ,  H01L29/78 ,  H01L21/304 ,  H01L21/306 ,  H01L21/321 ,  C11D3/43 ,  C11D3/37 ,  C11D3/30 ,  C11D3/00 ,  H01L21/02 ,  C11D11/00

摘要： A cleaning composition for cleaning a surface of a substrate comprising silicon germanium after a chemical mechanical polishing process is provided. The cleaning composition includes an oligomeric or polymeric polyamine, at least one wetting agent, a pH adjusting agent, and a solvent.

公开(公告)号：US20210364275A1

公开(公告)日：2021-11-25

申请号：US17194934

申请日：2021-03-08

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chih Hung CHEN ,  Kei-Wei CHEN ,  Te-Ming KUNG

IPC分类号： G01B11/06 ,  G01Q60/24

摘要： A method of evaluating a thickness of a film on a substrate includes detecting atomic force responses of the film to exposure of electromagnetic radiation in the infrared portion of the electromagnetic spectrum. The use of atomic force microscopy to evaluate thicknesses of thin films avoids underlayer noise commonly encountered when optical metrology techniques are utilized to evaluate film thicknesses. Such underlayer noise adversely impacts the accuracy of the thickness evaluation.

公开(公告)号：US20170352574A1

公开(公告)日：2017-12-07

申请号：US15171806

申请日：2016-06-02

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Kei-Wei CHEN ,  Chun-Hsiung TSAI ,  Huai-Tei YANG ,  Shiu-Ko JANGJIAN ,  Ying-Lang WANG ,  Ziwei FANG

IPC分类号： H01L21/687 ,  H01L21/3065 ,  H01J37/32 ,  H01L21/67

CPC分类号： H01L21/68764 ,  H01J37/32082 ,  H01J37/32422 ,  H01J37/3244 ,  H01L21/3065

摘要： An apparatus for treating a wafer is provided. The apparatus includes a platen, a chamber, an etch gas supplier and a tilting mechanism. The chamber has at least one aperture at least partially facing to the platen. The etch gas supplier is fluidly connected to the chamber. The tilting mechanism is coupled with the platen for allowing the platen to have at least one first degree of freedom to tilt relative to the aperture of the chamber.

公开(公告)号：US20160322474A1

公开(公告)日：2016-11-03

申请号：US14866594

申请日：2015-09-25

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Chun-Hsiung TSAI ,  Kei-Wei CHEN

IPC分类号： H01L29/66 ,  H01L29/78

摘要： A semiconductor structure includes a semiconductor substrate, n-type source and drain stressors, and a gate stack. The semiconductor substrate has source and drain recesses therein. The n-type source and drain stressors are respectively present in the source and drain recesses. At least one of the n-type source and drain stressors has a hydrogen terminated surface. A gate stack is present on the semiconductor substrate and between the n-type source and drain stressors.

摘要翻译： 半导体结构包括半导体衬底，n型源极和漏极应力源以及栅极堆叠。 半导体衬底在其中具有源极和漏极凹部。 n型源极和漏极应力分别分别存在于源极和漏极的漏极中。 n型源极和漏极应力源中的至少一个具有氢端接表面。 栅极堆叠存在于半导体衬底上以及n型源极和漏极应力源之间。

公开(公告)号：US20220362907A1

公开(公告)日：2022-11-17

申请号：US17877320

申请日：2022-07-29

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chih-Chieh CHANG ,  Yen-Ting CHEN ,  Hui-Chi HUANG ,  Kei-Wei CHEN

IPC分类号： B24B53/017 ,  B24B37/20

摘要： Provided herein are chemical-mechanical planarization (CMP) systems and methods to reduce metal particle pollution on dressing disks and polishing pads. Such methods may include contacting a dressing disk and at least one conductive element with an electrolyte solution and applying direct current (DC) power to the dressing disk and the at least one conductive element.

公开(公告)号：US20210272818A1

公开(公告)日：2021-09-02

申请号：US17323951

申请日：2021-05-18

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Yi-Sheng LIN ,  Chi-Jen LIU ,  Chi-Hsiang SHEN ,  Te-Ming KUNG ,  Chun-Wei HSU ,  Chia-Wei HO ,  Yang-Chun CHENG ,  William Weilun HONG ,  Liang-Guang CHEN ,  Kei-Wei CHEN

IPC分类号： H01L21/321 ,  H01L23/535 ,  H01L23/528 ,  H01L23/532 ,  H01L21/768

摘要： The current disclosure describes techniques of protecting a metal interconnect structure from being damaged by subsequent chemical mechanical polishing processes used for forming other metal structures over the metal interconnect structure. The metal interconnect structure is receded to form a recess between the metal interconnect structure and the surrounding dielectric layer. A metal cap structure is formed within the recess. An upper portion of the dielectric layer is strained to include a tensile stress which expands the dielectric layer against the metal cap structure to reduce or eliminate a gap in the interface between the metal cap structure and the dielectric layer.