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公开(公告)号:US20240145342A1
公开(公告)日:2024-05-02
申请号:US18152463
申请日:2023-01-10
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Tung-Liang Shao , You-Rong Shaw , Yu-Sheng Huang , Chen-Hua Yu
IPC: H01L23/473 , H01L21/48 , H01L21/56 , H01L23/00 , H01L23/31 , H01L25/065
CPC classification number: H01L23/473 , H01L21/4878 , H01L21/565 , H01L23/315 , H01L24/16 , H01L24/32 , H01L24/73 , H01L24/83 , H01L25/0652 , H01L2224/16235 , H01L2224/32225 , H01L2224/32245 , H01L2224/73204 , H01L2224/83359 , H01L2924/1632
Abstract: In an embodiment, a package includes an encapsulant laterally surrounding a first integrated circuit device and a second integrated circuit device, wherein the first integrated circuit device includes a die and a heat dissipation structure over the die; a sealant disposed over the heat dissipation structure; an adhesive disposed over the second integrated circuit device; and a lid disposed over the sealant and the adhesive, wherein the lid includes a first cooling passage and a second cooling passage, the first cooling passage including an opening at a bottom of the lid and aligned to the heat dissipation structure, the second cooling passage including channels aligned to the second integrated circuit device and being distant from the bottom of the lid.
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公开(公告)号:US20240105550A1
公开(公告)日:2024-03-28
申请号:US18152314
申请日:2023-01-10
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd
Inventor: Tung-Liang Shao , Yu-Sheng Huang , Hung-Yi Kuo , Chen-Hua Yu
IPC: H01L23/433 , H01L23/367 , H05K7/20
CPC classification number: H01L23/433 , H01L23/3675 , H05K7/20218
Abstract: A device includes an integrated circuit die attached to a substrate; a lid attached to the integrated circuit die; a sealant on the lid; a spacer structure attached to the substrate adjacent the integrated circuit die; and a cooling cover attached to the spacer structure, wherein the cooling cover extends over the lid, wherein the cooling cover attached to the lid by the sealant. In an embodiment, the device includes a ring structure on the substrate, wherein the ring structure is between the spacer structure and the integrated circuit die.
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公开(公告)号:US20240071965A1
公开(公告)日:2024-02-29
申请号:US17822879
申请日:2022-08-29
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Tung-Liang Shao , Yu-Sheng Huang , Wen-Hao Cheng , Chen-Hua Yu
CPC classification number: H01L24/08 , H01L23/3128 , H01L24/03 , H01L21/4857 , H01L23/481 , H01L24/80 , H01L2224/08145 , H01L2224/02311 , H01L2224/02375 , H01L2224/02313 , H01L2224/80895 , H01L2224/80896 , H01L2224/0239
Abstract: A package includes a first package component including a semiconductor die, wherein the semiconductor die includes conductive pads, wherein the semiconductor die is surrounded by an encapsulant; an adaptive interconnect structure on the semiconductor die, wherein the adaptive interconnect structure includes conductive lines, wherein each conductive line physically and electrically contacts a respective conductive pad; and first bond pads, wherein each first bond pad physically and electrically contacts a respective conductive line; and a second package component including an interconnect structure, wherein the interconnect structure includes second bond pads, wherein each second bond pad is directly bonded to a respective first bond pad, wherein each second bond pad is laterally offset from a corresponding conductive pad which is electrically coupled to that second bond pad.
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