公开(公告)号：US11594498B2

公开(公告)日：2023-02-28

申请号：US16931992

申请日：2020-07-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jiun Yi Wu ,  Chen-Hua Yu ,  Chung-Shi Liu

IPC: H01L23/538 ,  H01L21/48 ,  H01L25/00 ,  H01L25/065 ,  H01L23/00

Abstract: In an embodiment, a structure includes a core substrate, a redistribution structure coupled, the redistribution structure including a plurality of redistribution layers, the plurality of redistribution layers comprising a dielectric layer and a metallization layer, a first local interconnect component embedded in a first redistribution layer of the plurality of redistribution layers, the first local interconnect component comprising conductive connectors, the conductive connectors being bonded to a metallization pattern of the first redistribution layer, the dielectric layer of the first redistribution layer encapsulating the first local interconnect component, a first integrated circuit die coupled to the redistribution structure, a second integrated circuit die coupled to the redistribution structure, an interconnect structure of the first local interconnect component electrically coupling the first integrated circuit die to the second integrated circuit die, and a set of conductive connectors coupled to a second side of the core substrate.

公开(公告)号：US11532587B2

公开(公告)日：2022-12-20

申请号：US17170268

申请日：2021-02-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chien-Hsun Chen ,  Jiun Yi Wu ,  Chien-Hsun Lee ,  Chung-Shi Liu

IPC: H01L23/00 ,  H01L25/10 ,  H01L21/56

Abstract: A method includes placing a package component over a carrier, encapsulating the package component in an encapsulant, and forming a connection structure over and electrically coupling to the package component. The formation of the connection structure includes forming a first via group over and electrically coupling to the package component, forming a first conductive trace over and contacting the first via group, forming a second via group overlying and contacting the first conductive trace, wherein each of the first via group and the second via group comprises a plurality of vias, forming a second conductive trace over and contacting the second via group, forming a top via overlying and contacting the second conductive trace, and forming an Under-Bump-Metallurgy (UBM) over and contacting the top via.

公开(公告)号：US20220359445A1

公开(公告)日：2022-11-10

申请号：US17874402

申请日：2022-07-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jiun Yi Wu ,  Chen-Hua Yu

IPC: H01L23/00 ,  H01L21/56 ,  H01L21/48 ,  H01L23/31 ,  H01L23/498 ,  H01L21/768 ,  H01L23/538 ,  H01L21/02

Abstract: Semiconductor devices and methods of manufacture are described herein. The methods include forming a local organic interconnect (LOI) by forming a stack of conductive traces embedded in a passivation material, forming first and second local contacts over the passivation material, the second local contact being electrically coupled to the first local contact by a first conductive trace of the stack. The methods further include forming a backside redistribution layer (RDL) and a front side RDL on opposite sides of the LOI with TMVs electrically coupling the backside and front side RDLs to one another. First and second external contacts are formed over the backside RDL for mounting of semiconductor devices, the first and second external contacts being electrically connected to one another by the LOI. An interconnect structure is attached to the front side RDL for further routing. External connectors electrically coupled to the external contacts at the backside RDL.

公开(公告)号：US20220336335A1

公开(公告)日：2022-10-20

申请号：US17233081

申请日：2021-04-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jiun Yi Wu ,  Chen-Hua Yu

IPC: H01L23/498 ,  H01L23/00

Abstract: A semiconductor device and method of manufacture is provided including a redistribution structure; a plurality of core substrates attached to the redistribution structure using conductive connectors, each core substrate of the plurality of core substrates comprising a plurality of conductive posts; and one or more molding layers encapsulating the plurality of core substrates, where the one or more molding layers extends along sidewalls of the plurality of core substrates, and where the one or more molding layers extends along a portion of a sidewall of each of the conductive posts.

公开(公告)号：US20220328418A1

公开(公告)日：2022-10-13

申请号：US17808889

申请日：2022-06-24

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jiun Yi Wu ,  Chen-Hua Yu

IPC: H01L23/538 ,  H01L23/16 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

Abstract: A semiconductor package and methods of forming the same are disclosed. In an embodiment, a package includes a substrate; a first die disposed within the substrate; a redistribution structure over the substrate and the first die; and an encapsulated device over the redistribution structure, the redistribution structure coupling the first die to the encapsulated device.

公开(公告)号：US20220199461A1

公开(公告)日：2022-06-23

申请号：US17205383

申请日：2021-03-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Hua Yu ,  Wei-Yu Chen ,  Jiun Yi Wu ,  Chung-Shi Liu ,  Chien-Hsun Lee

IPC: H01L21/768 ,  H01L23/538 ,  H01L21/56 ,  H01L23/31

Abstract: A method includes attaching interconnect structures to a carrier substrate, wherein each interconnect structure includes a redistribution structure; a first encapsulant on the redistribution structure; and a via extending through the encapsulant to physically and electrically connect to the redistribution structure; depositing a second encapsulant on the interconnect structures, wherein adjacent interconnect structures are laterally separated by the second encapsulant; after depositing the second encapsulant, attaching a first core substrate to the redistribution structure of at least one interconnect structure, wherein the core substrate is electrically connected to the redistribution structure; and attaching semiconductor devices to the interconnect structures, wherein the semiconductor devices are electrically connected to the vias of the interconnect structures.

公开(公告)号：US11270990B2

公开(公告)日：2022-03-08

申请号：US16887936

申请日：2020-05-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jiun Yi Wu

IPC: H01L23/31 ,  H01L25/00 ,  H01L23/498 ,  H01L25/10 ,  H01L21/48 ,  H01L23/00 ,  H01L25/065

Abstract: A contoured package on package joint and a method for making the same are disclosed herein. A method for forming a device comprises providing a substrate having a package land and forming a mounting stud on the package land. A molded underfill is applied to the substrate and in contact with the mounting stud. A contoured stud surface is formed on the mounting stud is contoured and connecting member attached to the contoured stud surface with a second package attached to the connecting member. The connecting member may be solder and have a spherical shape. The contoured stud surface may be etched or mechanically formed to have a hemispherical shape conforming to the connecting member shape.

公开(公告)号：US10861836B2

公开(公告)日：2020-12-08

申请号：US16578297

申请日：2019-09-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jiun Yi Wu

IPC: H01L25/10 ,  H01L23/538 ,  H01L23/14 ,  H01L23/498 ,  H01L21/48 ,  H01L25/00 ,  H01L23/31 ,  H01L21/56

Abstract: Some embodiments relate to a package. The package includes a first substrate, a second substrate, and an interposer frame between the first and second substrates. The first substrate has a first connection pad disposed on a first face thereof, and the second substrate has a second connection pad disposed on a second face thereof. The interposer frame is arranged between the first and second faces and generally separates the first substrate from the second substrate. The interposer frame includes a plurality of through substrate holes (TSHs) which pass entirely through the interposer frame. A TSH is aligned with the first and second connection pads, and solder extends through the TSH to electrically connect the first connection pad to the second connection pad.

公开(公告)号：US20250130380A1

公开(公告)日：2025-04-24

申请号：US18431117

申请日：2024-02-02

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Hua Yu ,  Hsing-Kuo Hsia ,  Chih-Wei Tseng ,  Jiun Yi Wu ,  Jui Lin Chao

IPC: G02B6/42

Abstract: Optical devices and methods of manufacture are presented in which glass interposers are incorporated with optical devices. In some embodiments a method includes forming a first optical package and then bonding the first optical package to a first glass interposer. The first glass interposer may then be connected to a second interposer.

公开(公告)号：US12272631B2

公开(公告)日：2025-04-08

申请号：US18447008

申请日：2023-08-09

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jiun Yi Wu ,  Chen-Hua Yu

IPC: H01L23/498 ,  H01L23/00

Abstract: A semiconductor device and method of manufacture is provided including a redistribution structure; a plurality of core substrates attached to the redistribution structure using conductive connectors, each core substrate of the plurality of core substrates comprising a plurality of conductive posts; and one or more molding layers encapsulating the plurality of core substrates, where the one or more molding layers extends along sidewalls of the plurality of core substrates, and where the one or more molding layers extends along a portion of a sidewall of each of the conductive posts.