Semiconductor device
    12.
    发明授权

    公开(公告)号:US10777508B2

    公开(公告)日:2020-09-15

    申请号:US15347757

    申请日:2016-11-09

    Abstract: A semiconductor device includes a substrate including a plurality of chip areas and a scribe line defined thereon, and a mark pattern disposed in the scribe line. The mark pattern includes a plurality of unit cells immediately adjacent to each other, and each unit cell includes a first active region, a second active region isolated from the first active region, a plurality of first gate structures extending along a first direction and arranged along a second direction perpendicular to the first direction, and a plurality of first conductive structures. The first gate structures straddle the first active region and the second active region. The first conductive structures are disposed on the first active region, the second active region, and two opposite sides of the first gate structures.

    SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME

    公开(公告)号:US20250071983A1

    公开(公告)日:2025-02-27

    申请号:US18372130

    申请日:2023-09-24

    Abstract: A method for fabricating a semiconductor device includes the steps of first providing a substrate having a transistor region and an one time programmable (OTP) capacitor region, forming a first fin-shaped structure on the transistor region and a second fin-shaped structure on the OTP capacitor region, and then performing an oxidation process to form a gate oxide layer on the first fin-shaped structure and the second fin-shaped structure. Preferably, the first fin-shaped structure and the second fin-shaped structure have different shapes under a cross-section perspective.

    SEMICONDUCTOR DEVICE AND FABRICATING METHOD OF THE SAME

    公开(公告)号:US20240387523A1

    公开(公告)日:2024-11-21

    申请号:US18212188

    申请日:2023-06-21

    Abstract: A semiconductor device includes a substrate. A high voltage transistor is disposed within a high voltage region of the substrate. The high voltage transistor includes a first gate dielectric layer disposed on the substrate. A first gate electrode is disposed on the first gate dielectric layer. A first source/drain doping region and a second source/drain doping region are respectively disposed in the substrate at two sides of the first gate electrode. A first silicide layer covers and contacts the first source/drain doping region and a second silicide layer covers and contacts the second source/drain doping region. A first conductive plate penetrates the first silicide layer and contacts the first source/drain doping region. A second conductive plate penetrates the second silicide layer and contacts the second source/drain doping region.

    HIGH ELECTRON MOBILITY TRANSISTOR (HEMT) AND FORMING METHOD THEREOF

    公开(公告)号:US20220173236A1

    公开(公告)日:2022-06-02

    申请号:US17676799

    申请日:2022-02-21

    Abstract: A high electron mobility transistor (HEMT) includes a carrier transit layer, a carrier supply layer, a main gate, a control gate, a source electrode and a drain electrode. The carrier transit layer is on a substrate. The carrier supply layer is on the carrier transit layer. The main gate and the control gate are on the carrier supply layer. A fluoride ion doped region is formed right below the main gate in the carrier supply layer. The source electrode and the drain electrode are at two opposite sides of the main gate and the control gate, wherein the source electrode is electrically connected to the control gate by a metal interconnect. The present invention also provides a method of forming a high electron mobility transistor (HEMT).

Patent Agency Ranking