Memory system capable of generating notification signals

    公开(公告)号:US09959185B2

    公开(公告)日:2018-05-01

    申请号:US15140492

    申请日:2016-04-28

    Inventor: Hsin-Wen Chen

    CPC classification number: G06F11/27 G06F11/2289 G06F13/1689

    Abstract: A memory system includes a memory device, a switch device, and a built-in self-test circuit. The memory device is for storing data and toggling a notification signal whenever a read operation or a write operation is completed. The switch device has a first input terminal for receiving an external clock signal, a second input terminal coupled to the memory device for receiving the notification signal, a select terminal for receiving a selection signal, and an output terminal for outputting a memory clock signal to the memory device. The memory clock signal is one of the external clock signal and the notification signal. The built-in self-test circuit is for outputting a control signal required by the memory device to perform the read operation or the write operation and check whether the memory device functions normally.

    Memory device and driving method thereof
    12.
    发明授权
    Memory device and driving method thereof 有权
    存储装置及其驱动方法

    公开(公告)号:US09030886B2

    公开(公告)日:2015-05-12

    申请号:US13707601

    申请日:2012-12-07

    Inventor: Hsin-Wen Chen

    CPC classification number: G11C11/40 G11C5/14 G11C7/02 G11C11/417 G11C11/419

    Abstract: A memory device includes a memory array, an array gap, a voltage provider, and a voltage divider. The voltage provider is disposed in the array gap and coupled to a column of memory cells of the memory array for providing a first voltage to the column of memory cells when a memory cell of the column is selected at a write cycle. The voltage provider is coupled to the voltage provider and the column of memory cells for providing a second voltage lower than the first voltage to the column of memory cells when the memory of the column is half selected at the write cycle.

    Abstract translation: 存储器件包括存储器阵列,阵列间隙,电压提供器和分压器。 电压提供器设置在阵列间隙中,并且耦合到存储器阵列的存储单元列,用于当以写周期选择列的存储单元时,向存储器单元列提供第一电压。 电压提供器耦合到电压提供器和存储器单元列,用于当写入周期的一半选择列时,向存储器单元列提供低于第一电压的第二电压。

    Memory device and method for driving memory array thereof
    13.
    发明授权
    Memory device and method for driving memory array thereof 有权
    用于驱动其存储器阵列的存储器件和方法

    公开(公告)号:US08953401B2

    公开(公告)日:2015-02-10

    申请号:US13707611

    申请日:2012-12-07

    Inventor: Hsin-Wen Chen

    CPC classification number: G11C7/12 G11C11/419

    Abstract: A memory array includes a plurality of columns of memory cells and each column of memory cells of the memory array is coupled to a local voltage source, a bit line, and a bit line bar. Provide a working voltage to pre-charge the bit line and the bit line bar of the column of memory cells when a memory cell of the column of memory cells is selected to be read, and meanwhile use local voltage sources coupled to remaining columns of memory cells of the memory array to provide high voltages lower than the working voltage to pre-charge bit lines and bit line bars of the remaining columns of memory cells.

    Abstract translation: 存储器阵列包括多列存储器单元,并且存储器阵列的每列存储器单元耦合到本地电压源,位线和位线条。 当选择存储单元列的存储单元被读取时,提供工作电压以对存储器单元列的位线和位线条进行预充电,同时使用耦合到剩余存储列的本地电压源 存储器阵列的单元以提供低于工作电压的高电压以对存储器单元的剩余列的位线和位线条进行预充电。

    MEMORY DEVICE AND DRIVING METHOD THEREOF
    14.
    发明申请
    MEMORY DEVICE AND DRIVING METHOD THEREOF 有权
    存储器件及其驱动方法

    公开(公告)号:US20140160840A1

    公开(公告)日:2014-06-12

    申请号:US13707601

    申请日:2012-12-07

    Inventor: Hsin-Wen Chen

    CPC classification number: G11C11/40 G11C5/14 G11C7/02 G11C11/417 G11C11/419

    Abstract: A memory device includes a memory array, an array gap, a voltage provider, and a voltage divider. The voltage provider is disposed in the array gap and coupled to a column of memory cells of the memory array for providing a first voltage to the column of memory cells when a memory cell of the column is selected at a write cycle. The voltage provider is coupled to the voltage provider and the column of memory cells for providing a second voltage lower than the first voltage to the column of memory cells when the memory of the column is half selected at the write cycle.

    Abstract translation: 存储器件包括存储器阵列,阵列间隙,电压提供器和分压器。 电压提供器设置在阵列间隙中,并且耦合到存储器阵列的存储单元列,用于当以写周期选择列的存储单元时,向存储器单元列提供第一电压。 电压提供器耦合到电压提供器和存储器单元列,用于当写入周期的一半选择列时,向存储器单元列提供低于第一电压的第二电压。

Patent Agency Ranking