Two Doping Regions in Lightly Doped Drain for Thin Film Transistors and Associated Doping Processes
    11.
    发明申请
    Two Doping Regions in Lightly Doped Drain for Thin Film Transistors and Associated Doping Processes 有权
    用于薄膜晶体管和相关掺杂过程的轻掺杂漏极中的两个掺杂区域

    公开(公告)号:US20140061656A1

    公开(公告)日:2014-03-06

    申请号:US13601535

    申请日:2012-08-31

    Abstract: A method is provided for fabricating thin-film transistors (TFTs) for an LCD having an array of pixels. The method includes depositing a first photoresist layer over a portion of a TFT stack that includes a conductive gate layer, and a semiconductor layer. The method also includes doping the exposed semiconductor layer with a first doping dose. The method further includes etching a portion of the conductive gate layer to expose a portion of the semiconductor layer, and doping the exposed portion of the semiconductor layer with a second doping dose. The method also includes depositing a second photoresist layer over a first portion of the doped semiconductor layer in an active area of the pixels to expose a second portion of the doped semiconductor layer in an area surrounding the active area, and doping the second portion of the doped semiconductor layer with a third doping dose.

    Abstract translation: 提供了一种制造用于具有像素阵列的LCD的薄膜晶体管(TFT)的方法。 该方法包括在包括导电栅极层的TFT堆叠的一部分上沉积第一光致抗蚀剂层和半导体层。 该方法还包括以第一掺杂剂量掺杂暴露的半导体层。 该方法还包括蚀刻导电栅极层的一部分以暴露半导体层的一部分,并以第二掺杂剂量掺杂半导体层的暴露部分。 该方法还包括在像素的有源区域中在掺杂半导体层的第一部分上沉积第二光致抗蚀剂层,以在有源区域周围的区域中暴露掺杂半导体层的第二部分,以及掺杂半导体层的第二部分 掺杂半导体层具有第三掺杂剂量。

    INTERFERENCE REDUCTION SYSTEMS AND METHODS
    12.
    发明申请
    INTERFERENCE REDUCTION SYSTEMS AND METHODS 有权
    干扰减少系统和方法

    公开(公告)号:US20130052971A1

    公开(公告)日:2013-02-28

    申请号:US13217902

    申请日:2011-08-25

    CPC classification number: H04B15/04

    Abstract: The antenna on hand held devices, such as the iPhone or iPad, can be subject to interference from other circuitry on the device. Such interference may come from high frequency switching of nearby display circuitry, such as de-multiplexors or other circuits. To address this issue, the switching rates may be slowed in certain circuits by adding resistance and/or capacitance, thus raising the RC time constant and slowing the switching times to reduce the high frequency components. Alternatively or in addition to, an EMI shield can be placed over some or all of the display driving circuitry to shield the antenna from high frequency interference.

    Abstract translation: 手持式设备(如iPhone或iPad)的天线可能受到设备上其他电路的干扰。 这种干扰可能来自附近的显示电路(例如解复用器或其他电路)的高频切换。 为了解决这个问题,通过增加电阻和/或电容,某些电路中的开关速率可能会降低,从而提高RC时间常数并减慢开关时间,以减少高频分量。 或者或除此之外,可以将EMI屏蔽物放置在部分或全部显示驱动电路上,以将天线屏蔽在高频干扰之下。

    Two doping regions in lightly doped drain for thin film transistors and associated doping processes
    13.
    发明授权
    Two doping regions in lightly doped drain for thin film transistors and associated doping processes 有权
    用于薄膜晶体管和相关掺杂工艺的轻掺杂漏极中的两个掺杂区域

    公开(公告)号:US08987027B2

    公开(公告)日:2015-03-24

    申请号:US13601535

    申请日:2012-08-31

    Abstract: A method is provided for fabricating thin-film transistors (TFTs) for an LCD having an array of pixels. The method includes depositing a first photoresist layer over a portion of a TFT stack that includes a conductive gate layer, and a semiconductor layer. The method also includes doping the exposed semiconductor layer with a first doping dose. The method further includes etching a portion of the conductive gate layer to expose a portion of the semiconductor layer, and doping the exposed portion of the semiconductor layer with a second doping dose. The method also includes depositing a second photoresist layer over a first portion of the doped semiconductor layer in an active area of the pixels to expose a second portion of the doped semiconductor layer in an area surrounding the active area, and doping the second portion of the doped semiconductor layer with a third doping dose.

    Abstract translation: 提供了一种制造用于具有像素阵列的LCD的薄膜晶体管(TFT)的方法。 该方法包括在包括导电栅极层的TFT堆叠的一部分上沉积第一光致抗蚀剂层和半导体层。 该方法还包括以第一掺杂剂量掺杂暴露的半导体层。 该方法还包括蚀刻导电栅极层的一部分以暴露半导体层的一部分,并以第二掺杂剂量掺杂半导体层的暴露部分。 该方法还包括在像素的有源区域中在掺杂半导体层的第一部分上沉积第二光致抗蚀剂层,以在有源区域周围的区域中暴露掺杂半导体层的第二部分,以及掺杂半导体层的第二部分 掺杂半导体层具有第三掺杂剂量。

    Display edge seal improvement
    14.
    发明授权
    Display edge seal improvement 有权
    显示边缘密封改进

    公开(公告)号:US08976094B2

    公开(公告)日:2015-03-10

    申请号:US13101680

    申请日:2011-05-05

    CPC classification number: G02F1/1339 G02F2001/133357 G02F2001/133388

    Abstract: Embodiments of the present disclosure relate to liquid crystal displays (LCDs) and electronic devices incorporating LCDs having an organic passivation layer positioned between edge-sealed two substrates. Specifically, embodiments of the present disclosure employ lithographic techniques (e.g., a half-tone mask, diffractive exposure mask, etc.) to remove or not deposit a portion of the organic passivation layer near the edges of the substrates prior to sealing the substrates along these edges. As described herein, this reduction in the thickness of the organic layer near the edges of the device may improve the strength of the edge seal due to reduced strain in the organic layer.

    Abstract translation: 本公开的实施例涉及液晶显示器(LCD)和具有位于边缘密封的两个基板之间的具有有机钝化层的LCD的电子设备。 具体地,本公开的实施例使用光刻技术(例如,半色调掩模,衍射曝光掩模等),以在密封基板之前移除或不沉积基板边缘附近的部分有机钝化层 这些边缘。 如本文所述,在器件边缘附近的有机层的厚度的减小可以由于有机层中的应变减小而提高边缘密封的强度。

    DISPLAY EDGE SEAL IMPROVEMENT
    15.
    发明申请
    DISPLAY EDGE SEAL IMPROVEMENT 有权
    显示边缘密封改进

    公开(公告)号:US20120280957A1

    公开(公告)日:2012-11-08

    申请号:US13101680

    申请日:2011-05-05

    CPC classification number: G02F1/1339 G02F2001/133357 G02F2001/133388

    Abstract: Embodiments of the present disclosure relate to liquid crystal displays (LCDs) and electronic devices incorporating LCDs having an organic passivation layer positioned between edge-sealed two substrates. Specifically, embodiments of the present disclosure employ lithographic techniques (e.g., a half-tone mask, diffractive exposure mask, etc.) to remove or not deposit a portion of the organic passivation layer near the edges of the substrates prior to sealing the substrates along these edges. As described herein, this reduction in the thickness of the organic layer near the edges of the device may improve the strength of the edge seal due to reduced strain in the organic layer.

    Abstract translation: 本公开的实施例涉及液晶显示器(LCD)和具有位于边缘密封的两个基板之间的具有有机钝化层的LCD的电子设备。 具体地,本公开的实施例使用光刻技术(例如,半色调掩模,衍射曝光掩模等),以在密封基板之前移除或不沉积基板边缘附近的部分有机钝化层 这些边缘。 如本文所述,在器件边缘附近的有机层的厚度的减小可以由于有机层中的应变减小而提高边缘密封的强度。

    System for displaying images
    16.
    发明申请
    System for displaying images 有权
    用于显示图像的系统

    公开(公告)号:US20090073015A1

    公开(公告)日:2009-03-19

    申请号:US12229360

    申请日:2008-08-21

    Applicant: Cheng-Ho Yu

    Inventor: Cheng-Ho Yu

    CPC classification number: H03M1/1014 H03M1/78

    Abstract: A system for displaying images is provided. A capacitor type digital-to-analog converter is coupled between a first node and a second node and generates a first analog signal according to a digital signal with N bit data. An analogue buffer is coupled between the second node and a third node and generates a second analog signal according to the first analog signal and a bias voltage. A first switch is coupled between a predetermined voltage and the second node. A second switch is coupled between the first node and the third node. A third switch is coupled between the third node and an analog output signal. The second switch is turned on and the third switch is turned off when the first switch is turned on, and the first and second switches are turned off when the third switch is turned on.

    Abstract translation: 提供了一种用于显示图像的系统。 电容器型数模转换器耦合在第一节点和第二节点之间,并根据具有N位数据的数字信号产生第一模拟信号。 模拟缓冲器耦合在第二节点和第三节点之间,并且根据第一模拟信号和偏置电压产生第二模拟信号。 第一开关耦合在预定电压和第二节点之间。 第二开关耦合在第一节点和第三节点之间。 第三开关耦合在第三节点和模拟输出信号之间。 当第一开关接通时,第二开关被接通并且第三开关被断开,并且当第三开关接通时第一和第二开关被断开。

    Common electrode connections in integrated touch screens
    17.
    发明授权
    Common electrode connections in integrated touch screens 有权
    集成触摸屏中的公共电极连接

    公开(公告)号:US09195331B2

    公开(公告)日:2015-11-24

    申请号:US13312940

    申请日:2011-12-06

    CPC classification number: G06F3/0412 G02F1/13338 G06F3/044 H01L2224/48137

    Abstract: Common electrodes (Vcom) of integrated touch screens can be segmented into electrically isolated Vcom portions that can be operated as drive lines and/or sense lines of a touch sensing system. The touch screen can include high-resistivity connections between Vcom portions. The resistivity of the high-resistivity connections can be high enough so that touch sensing and image display can be performed by the touch screen, and the high-resistivity connections can provide an added functionality by allowing a charge build up on one of the Vcom portions to be spread to other Vcom portions and/or discharged from system by allowing charge to leak through the high-resistivity connections. In this way, for example, visual artifacts that result from charge build up on a Vcom portion can be reduced or eliminated.

    Abstract translation: 集成触摸屏的公共电极(Vcom)可以被分割成电隔离的Vcom部分,其可以作为触摸感测系统的驱动线和/或感测线来操作。 触摸屏可以包括Vcom部分之间的高电阻连接。 高电阻率连接的电阻率可以足够高,以便可以通过触摸屏进行触摸感测和图像显示,并且高电阻率连接可以通过允许在Vcom部分之一上积累电荷来提供附加功能 通过允许电荷通过高电阻率连接泄漏而扩散到其它Vcom部分和/或从系统排出。 以这种方式,例如,可以减少或消除由在Vcom部分上积累的电荷导致的视觉伪影。

    Devices and methods for reducing the size of display panel routings
    18.
    发明授权
    Devices and methods for reducing the size of display panel routings 有权
    用于减小显示面板路线尺寸的设备和方法

    公开(公告)号:US08804061B2

    公开(公告)日:2014-08-12

    申请号:US13477953

    申请日:2012-05-22

    CPC classification number: G02F1/13458 G02F2001/13629

    Abstract: Disclosed embodiments relate to signal routings for use in a display device. The display device may include a liquid crystal display (LCD) panel having multiple pixels arranged in rows and columns. Each of the pixels includes a pixel electrode and a thin-film transistor (TFT). The LCD may include a conductive signal routing portion having a first metallic layer, a second metallic layer formed directly on the first metallic layer, and a third metallic layer formed directly on the second metallic layer. The first metallic layer may include a contact terminal. The second metallic layer when combined with the third metallic layers may decrease the resistance of the third metallic layer.

    Abstract translation: 公开的实施例涉及用于显示设备中的信号路由。 显示装置可以包括具有以行和列排列的多个像素的液晶显示器(LCD)面板。 每个像素包括像素电极和薄膜晶体管(TFT)。 LCD可以包括具有第一金属层,直接形成在第一金属层上的第二金属层和直接形成在第二金属层上的第三金属层的导电信号路由部分。 第一金属层可以包括接触端子。 当与第三金属层组合时,第二金属层可以降低第三金属层的电阻。

    Interference reduction systems and methods
    19.
    发明授权
    Interference reduction systems and methods 有权
    干扰减少系统和方法

    公开(公告)号:US08731491B2

    公开(公告)日:2014-05-20

    申请号:US13217902

    申请日:2011-08-25

    CPC classification number: H04B15/04

    Abstract: The antenna on hand held devices, such as the iPhone or iPad, can be subject to interference from other circuitry on the device. Such interference may come from high frequency switching of nearby display circuitry, such as de-multiplexors or other circuits. To address this issue, the switching rates may be slowed in certain circuits by adding resistance and/or capacitance, thus raising the RC time constant and slowing the switching times to reduce the high frequency components. Alternatively or in addition to, an EMI shield can be placed over some or all of the display driving circuitry to shield the antenna from high frequency interference.

    Abstract translation: 手持式设备(如iPhone或iPad)的天线可能受到设备上其他电路的干扰。 这种干扰可能来自附近的显示电路(例如解复用器或其他电路)的高频切换。 为了解决这个问题,通过增加电阻和/或电容,某些电路中的开关速率可能会降低,从而提高RC时间常数并减慢开关时间,以减少高频分量。 或者或除此之外,可以将EMI屏蔽物放置在部分或全部显示驱动电路上以屏蔽天线免受高频干扰。

    Display with Multilayer and Embedded Signal Lines
    20.
    发明申请
    Display with Multilayer and Embedded Signal Lines 有权
    显示多层和嵌入式信号线

    公开(公告)号:US20140043552A1

    公开(公告)日:2014-02-13

    申请号:US13584549

    申请日:2012-08-13

    CPC classification number: G02F1/13454 G02F1/133528 G02F1/136286 G02F1/1368

    Abstract: A display may have a thin-film-transistor layer with a substrate layer. A layer of dielectric may be formed on the substrate layer and may have an upper surface and a lower surface. The thin-film-transistor layer may include an array of display pixels. Data lines and gate lines may provide signals to the display pixels. Gate driver circuitry in an inactive peripheral portion of the display may include a gate driver circuit for each gate line. The gate driver circuits may include thin-film transistors that are formed on the upper surface of the layer of dielectric. Signal lines such as a gate low line, a gate routing line coupled between the gate driver circuits, and a common electrode line may be formed from two or more layers of metal to reduce their widths or may be embedded within the dielectric layer between the upper and lower surfaces under the thin-film transistors.

    Abstract translation: 显示器可以具有带有衬底层的薄膜晶体管层。 电介质层可以形成在衬底层上,并且可以具有上表面和下表面。 薄膜晶体管层可以包括显示像素阵列。 数据线和栅极线可以向显示像素提供信号。 显示器的非活动外围部分中的栅极驱动器电路可以包括用于每个栅极线的栅极驱动器电路。 栅极驱动器电路可以包括形成在电介质层的上表面上的薄膜晶体管。 耦合在栅极驱动电路和公共电极线之间的诸如栅极低线,栅极布线线的信号线可以由两个或更多个金属层形成以减小它们的宽度,或者可以嵌入在上部的电介质层之间 和薄膜晶体管下的下表面。

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