Configuration and Fabrication of Semiconductor Structure in Which Source and Drain Extensions of Field-effect Transistor Are Defined with Different Dopants
    11.
    发明申请
    Configuration and Fabrication of Semiconductor Structure in Which Source and Drain Extensions of Field-effect Transistor Are Defined with Different Dopants 有权
    使用不同掺杂剂定义场效应晶体管的源极和漏极扩展的半导体结构的配置和制造

    公开(公告)号:US20120184077A1

    公开(公告)日:2012-07-19

    申请号:US13100192

    申请日:2011-05-03

    Abstract: An insulated-gate field-effect transistor (100) provided along an upper surface of a semiconductor body contains a pair of source/drain zones (240 and 242) laterally separated by a channel zone (244). A gate electrode (262) overlies a gate dielectric layer (260) above the channel zone. Each source/drain zone includes a main portion (240M or 242M) and a more lightly doped lateral extension (240E or 242E) laterally continuous with the main portion and extending laterally under the gate electrode. The lateral extensions, which terminate the channel zone along the upper semiconductor surface, are respectively largely defined by a pair of semiconductor dopants of different atomic weights. With the transistor being an asymmetric device, the source/drain zones constitute a source and a drain. The lateral extension of the source is then more lightly doped than, and defined with dopant of higher atomic weight, than the lateral extension of the drain.

    Abstract translation: 沿着半导体主体的上表面设置的绝缘栅场效应晶体管(100)包含由沟道区(244)横向隔开的一对源极/漏极区(240和242)。 栅电极(262)覆盖沟道区上方的栅介电层(260)。 每个源极/漏极区域包括主要部分(240M或242M)和与主要部分横向连续并在栅电极下方横向延伸的更轻掺杂的横向延伸部(240E或242E)。 沿着上半导体表面终止沟道区的横向延伸部分分别由不同原子量的一对半导体掺杂剂限定。 在晶体管是非对称器件的情况下,源极/漏极区域构成源极和漏极。 源极的横向延伸比起漏极的横向延伸稍微掺杂,并且由原子量较高的掺杂剂限定。

    Structure and fabrication of field-effect transistor using empty well in combination with source/drain extensions or/and halo pocket
    18.
    发明申请
    Structure and fabrication of field-effect transistor using empty well in combination with source/drain extensions or/and halo pocket 有权
    使用空穴与源极/漏极延伸部分或/和晕圈组合的场效应晶体管的结构和制造

    公开(公告)号:US20100244130A1

    公开(公告)日:2010-09-30

    申请号:US12382968

    申请日:2009-03-27

    Abstract: Insulated-gate field-effect transistors (“IGFETs”), both symmetric and asymmetric, suitable for a semiconductor fabrication platform that provides IGFETs for analog and digital applications, including mixed-signal applications, utilize empty-well regions in achieving high performance. A relatively small amount of semiconductor well dopant is near the top of each empty well. Each IGFET (100, 102, 112, 114, 124, or 126) has a pair of source/drain zones laterally separated by a channel zone of body material of the empty well (180, 182, 192, 194, 204, or 206). A gate electrode overlies a gate dielectric layer above the channel zone. Each source/drain zone (240, 242, 280, 282, 520, 522, 550, 552, 720, 722, 752, or 752) has a main portion (240M, 242M, 280M, 282M, 520M, 522M, 550M, 552M, 720M, 722M, 752M, or 752M) and a more lightly doped lateral extension (240E, 242E, 280E, 282E, 520E, 522E, 550E, 552E, 720E, 722E, 752E, or 752E). Alternatively or additionally, a more heavily doped pocket portion (250 or 290) of the body material extends along one of the source/drain zones. When present, the pocket portion typically causes the IGFET to be an asymmetric device.

    Abstract translation: 对称和不对称的绝缘栅场效应晶体管(“IGFET”)适用于为模拟和数字应用(包括混合信号应用)提供IGFET的半导体制造平台,利用空井区域实现高性能。 相对少量的半导体阱掺杂剂在每个空的孔的顶部附近。 每个IGFET(100,102,112,114,124或126)具有由空井(180,182,192,194,204或206)的主体材料的通道区横向隔开的一对源/排出区 )。 栅极电极覆盖在沟道区上方的栅极电介质层。 每个源/漏区(240,242,282,282,520,522,550,552,720,722,752或752)具有主要部分(240M,242M,280M,282M,520M,522M,550M, 552M,720M,722M,752M或752M)和更轻掺杂的侧向延伸部(240E,242E,280E,282E,520E,522E,550E,552E,720E,722E,752E或752E)。 替代地或另外地,主体材料的更加掺杂的凹穴部分(250或290)沿着源极/漏极区域中的一个延伸。 当存在时,口袋部分通常使IGFET成为非对称装置。

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