摘要:
A first surface charge transistor and a second surface charge transistor are provided in a common substrate. During a first phase of a cycle of operation a first voltage signal is applied to the transfer gate of the first transistor and a second voltage signal is applied to the transfer gate of the second transistor. During a second phase of the cycle of operation, the first voltage signal is applied to the transfer gate of the second transistor and the second voltage signal is applied to the transfer gate of the first transistor. During the first phase the source region and the transfer gate region of each of the transistors are equilibrated. The receiver regions or nodes of each of the transistors are precharged and then floated or isolated. During the second phase of the cycle, the receiver nodes accumulate an amount of charge proportional to the change of voltage resulting from the switching of the signals. Charge is received, however, only if a transfer gate becomes more positive (for n-channel transistors). The receiver node associated with the more positive signal in the first phase of operation will therefore remain charged while the receiver node associated with the more negative signal will be discharged, by transfer of charge, toward ground. The extent of the potential change is proportional to the difference between the two voltage signals and the gain of the surface charge transistors.
摘要:
A B-scan ultrasound probe imaging system including an array of annular transducers is described in which dynamic focussing is provided by coherent demodulation of the echo signals generated in the transducers. As the range from which echoes are being received increases, coherent demodulation is maintained. The system provides improved lateral resolution over a greatly extended useful range.
摘要:
An analog multiplier for multiplying each sample of an input sequence of samples of an analog signal by a respective multiplying coefficient of a series of coefficients is provided. The multiplier includes a plurality of charge storage cells, each cell including a first and a second storage region. Means are provided for introducing into each of the charge storage cells a respective quantity of charge representing a respective sample of a signal. The quantity of charge is divided between the first and second storage regions of a cell in proportion to the ratio of the width of the first storage region to width of the second storage region thereof. Means are provided for altering the charge in each of the second storage regions of each of the cells. Means are provided for recovering from each of the cells a respective resultant quantity of charge stored therein, each resultant quantity being the sum of the initially introduced charge in the first storage region and the altered charge in second storage region of a respective cell. Thus, each resultant quantity of charge represents the product of an analog input sample multiplied by a respective multiplying coefficient corresponding to the relative values of the widths of the first and second storage regions of a cell.
摘要:
The output circuit includes a high gain differential amplifier having an inverting input terminal, a non-inverting input terminal and an output terminal with a feedback capacitance connected between the output terminal and the inverting input terminal. The input terminals are connected to first and second commonly phased lines of the charge transfer transversal filter. A first switchable impedance means is connected between the first line and the output terminal. A second switchable impedance means is connected between the second line and a d-c source of voltage. The lines are charged periodically to the voltage of the source by the first and second switchable impedance means prior to the transfer of charge in a cycle of operation of the filter and are then isolated from the source during the transfer of charge in the filter by the first and second switchable impedance means.
摘要:
Methods for storing and transferring electrical charges between adjacently spaced storage regions in semiconductor substrate are disclosed. In one embodiment, a plurality of adjacently spaced conductor members are insulatingly disposed over a major surface of a semiconductor substrate. Each storage region is separated from each other storage region by an electrical barrier region underlying the spacing between the adjacent conductor members. These barrier regions are controllably lowered by an electrode interposed between adjacent conductor members. Electrical charges stored in one storage region are transferred to an adjacent storage region by applying a voltage signal to the interposed electrode to lower the barrier region between the adjacent storage regions. Direction of charge transfer is controlled by the relative surface potentials of the adjacent storage regions and the magnitude of transfer is controlled by the height of the barrier region when lowered. Means for transferring partial charges are disclosed along with means for periodically regenerating charges to a predetermined level. Methods for transferring electrical charges with high efficiency of transfer are also disclosed.
摘要:
In a charge transfer transversal filter a substrate of one conductivity type semiconductor material is provided. A plurality of electrodes insulatingly overlie the substrate and form therewith a plurality of stages of a charge transfer shift register. One electrode of each of the stages is split into a first and a second part with a small gap therebetween. A region of opposite conductivity type is provided in the substrate underlying each of the gaps to electrically couple the pair of storage regions underlying each of the one electrodes. A first clock line is connected to the first parts of the one electrodes. A second clock line is connected to the second parts of the one electrodes. Means are provided for applying phase related voltage to each of the stages of the shift register to effect transfer of charge from stage to stage. The same voltage is applied to the first and second clock lines.
摘要:
An ultrasonic imaging system beamforming architecture comprises a fixed wideband preprocessor section followed by a reduced number of dynamically adjusted delay channels. The preprocessor includes a transform beamformer with spatial filtering followed by a delay beamformer. Each transform preprocessor provides transformation of the local array space data into beam space. One, or combinations, of these beams may then be selected as input signals to an inverse transform which converts the beam space data back into array space data. This re-establishes the spatial array, but with a reduced directional view, allowing an inverse transform of reduced size to be used for the reconstruction. The result is a decrease in the number of channels required by the remainder of the beamformer. If the beam direction specified in the preprocessor sections is different from that specified in the channel delay processor, a resulting error that causes spurious beams to be formed in unwanted directions is mitigated by forming a spatial filter in each preprocessor section using adjacent channel information.
摘要:
An ultrasonic imaging system for displaying color flow images includes a receiver which demodulates ultrasonic echo signals received by a transducer array and dynamically focuses the baseband echo signals. A color flow processor includes a frequency domain adaptive wall filter which automatically adjusts to changes in Doppler-shifted frequency and bandwidth of the wall signal components in the focused baseband echo signals after the echo signals have undergone Fourier transformation into the frequency domain. The mean Doppler-shifted frequency of the resulting filtered baseband echo signals is used to indicate velocity of moving scatterers and to control color in the displayed image.
摘要:
Digital synapse input signals which are temporally aligned with each other are converted to analog form for application to a neural net layer. Several digital synapse input signals can be written into digital memory at different times, to be read out in temporal alignment for conversion to analog form for application to a neural net layer. The digital synapse input signals can originate from apparatus for raster-scanning a field or successive fields of video samples, for example, with the neural net layer providing filters for recognizing shapes in a field of the video samples. The neural net layer can be either a pre-programmed type or a learning type, and its axonal outputs may be digitized for use in subsequent digital processing.
摘要:
Parallel architectures preprocesses large matrices from sampled coherent time apertures receiving signals from distant sources to produce lower order matrices, derived from pseudo coherent time apertures, which are computationally less burdensome. The large matrices are processed by frequency shifting, low pass filtering with an FIR filter, and executing front-end decimation to create the pseudo coherent time apertures, each corresponding to different subbands of the temporal frequency spectrum. The signals representing the pseudo coherent time apertures are processed using matrix based superresolution spectral estimation algorithms such as the Tufts-Kumaresan (T-K) reduced rank modified covariance algorithm and the Linear Minimum Free Energy algorithms to produce an image of the sources.