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公开(公告)号:US11211010B2
公开(公告)日:2021-12-28
申请号:US17125745
申请日:2020-12-17
Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.
Inventor: Yong Yuan
IPC: G09G3/30 , G09G3/32 , G09G3/3258 , G09G3/3266 , G09G3/3291 , H01L27/32 , H01L27/12 , H01L29/786
Abstract: A display panel and a driving method thereof, and a display device are provided. The display panel includes pixel circuits. Each pixel circuit includes a driving transistor, a data writing circuit, a light-emitting control circuit, a threshold compensation circuit and a bias adjustment circuit. The driving transistor includes a gate electrically connected to a first node, a first terminal electrically connected to a second node, and a second terminal electrically connected to the third node, and is configured to generate a driving current. The third node is connected to a light-emitting element through the light-emitting control circuit. The bias adjustment circuit is configured to provide a signal of a bias adjustment signal terminal to the second node under control of a signal of a first scanning signal terminal in such a manner that a bias state of the driving transistor is adjusted.
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公开(公告)号:US11189732B2
公开(公告)日:2021-11-30
申请号:US16727952
申请日:2019-12-27
Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.
Inventor: Yong Yuan
Abstract: An array substrate includes a substrate, a first thin film transistor, and a second thin film transistor, and the first thin film transistor and the second thin film transistor each are located on a same side of the substrate. The first thin film transistor includes a first active layer being a polysilicon layer, and the second thin film transistor includes a second active layer being an oxide semiconductor layer and includes a first contact layer and a second contact layer. The first contact layer is located between the substrate and the second active layer, the second contact layer is located on a side of the second active layer facing away from the substrate, the first contact layer and the second contact layer each are in contact with the second active layer, and the second active layer, the first contact layer, and the second contact layer each are island-shaped.
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公开(公告)号:US12112708B2
公开(公告)日:2024-10-08
申请号:US18198013
申请日:2023-05-16
Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.
Inventor: Qingjun Lai , Yihua Zhu , Yong Yuan , Ping An , Zhaokeng Cao
IPC: G09G3/3266 , G09G3/20 , G09G3/3233 , G11C19/20 , G11C19/28
CPC classification number: G09G3/3266 , G09G3/20 , G11C19/20 , G11C19/28 , G09G3/3233 , G09G2300/0426 , G09G2300/0819 , G09G2300/0842 , G09G2300/0861 , G09G2310/0286 , G09G2310/061 , G09G2310/08
Abstract: A display panel includes a pixel circuit and a driving circuit. The pixel circuit includes a driving transistor. The driving circuit is configured to provide a signal for the pixel circuit, receive a third voltage signal and a fourth voltage signal, and generate an output signal. The third voltage signal is a high-level signal, and the fourth voltage signal is a low-level signal. A working process of the pixel circuit includes a reset phase and a bias phase. The output signal of the driving circuit is a reset signal in the reset phase. The output signal of the driving circuit is a bias signal in the bias phase. In response to the driving transistor being a PMOS transistor, the reset signal is the fourth voltage signal, and the bias signal is the third voltage signal.
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公开(公告)号:US11942027B2
公开(公告)日:2024-03-26
申请号:US17994560
申请日:2022-11-28
Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.
Inventor: Yong Yuan
IPC: G09G3/32
CPC classification number: G09G3/32 , G09G2300/043 , G09G2300/0819 , G09G2320/0233 , G09G2320/045
Abstract: Provided are a display panel and a display device. The display panel includes a pixel circuit and a light-emitting element. The pixel circuit includes a data write module, a drive module and a compensation module. The drive module includes a drive transistor. The data write module is connected to an input terminal of the drive module; a first electrode of the compensation module is connected to an output terminal of the drive module, and a second electrode of the compensation module is connected to a control terminal of the drive module. The data write module includes a data write transistor and a bias transistor, the data write transistor is connected to a data signal input terminal and configured to transmit a data signal, and the bias transistor is connected to a bias signal input terminal and configured to transmit a bias signal.
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公开(公告)号:US11908388B2
公开(公告)日:2024-02-20
申请号:US17994538
申请日:2022-11-28
Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.
Inventor: Yong Yuan
IPC: G09G3/32
CPC classification number: G09G3/32 , G09G2300/043 , G09G2300/0819 , G09G2320/0233 , G09G2320/045
Abstract: Provided are a display panel and a display device. The display panel includes a pixel circuit and a light-emitting element. The pixel circuit includes a data write module, a drive module and a compensation module. The drive module includes a drive transistor. The data write module is connected to an input terminal of the drive module; a first electrode of the compensation module is connected to an output terminal of the drive module, and a second electrode of the compensation module is connected to a control terminal of the drive module. The data write module includes a data write transistor and a bias transistor, the data write transistor is connected to a data signal input terminal and configured to transmit a data signal, and the bias transistor is connected to a bias signal input terminal and configured to transmit a bias signal.
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公开(公告)号:US11881157B2
公开(公告)日:2024-01-23
申请号:US17994627
申请日:2022-11-28
Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.
Inventor: Yong Yuan
IPC: G09G3/32
CPC classification number: G09G3/32 , G09G2300/043 , G09G2300/0819 , G09G2320/0233 , G09G2320/045
Abstract: Provided are a display panel and a display device. The display panel includes a pixel circuit and a light-emitting element. The pixel circuit includes a drive module and a data write module. The drive module is configured to provide a drive current for the light-emitting element and comprises a drive transistor. An operation of the pixel circuit includes a bias stage, in the bias stage, the data write module and the drive module are on, a compensation module is off, a data signal provides a bias signal for a drain of the drive transistor to adjust a bias state of the drive transistor.
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公开(公告)号:US11881156B2
公开(公告)日:2024-01-23
申请号:US17994552
申请日:2022-11-28
Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.
Inventor: Yong Yuan
IPC: G09G3/32
CPC classification number: G09G3/32 , G09G2300/043 , G09G2300/0819 , G09G2320/0233 , G09G2320/045
Abstract: Provided are a display panel and a display device. The display panel includes a pixel circuit and a light-emitting element. The pixel circuit includes a data write module, a drive module and a compensation module. The drive module includes a drive transistor. The data write module is connected to an input terminal of the drive module; a first electrode of the compensation module is connected to an output terminal of the drive module, and a second electrode of the compensation module is connected to a control terminal of the drive module. The data write module includes a data write transistor and a bias transistor, the data write transistor is connected to a data signal input terminal and configured to transmit a data signal, and the bias transistor is connected to a bias signal input terminal and configured to transmit a bias signal.
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公开(公告)号:US11837606B2
公开(公告)日:2023-12-05
申请号:US17451136
申请日:2021-10-15
Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.
Inventor: Qingjun Lai , Yihua Zhu , Yong Yuan , Ping An , Zhaokeng Cao
CPC classification number: H01L27/1225 , G11C19/28 , G09G2310/0286
Abstract: A display panel and a display device are provided. The display panel includes at least one driving circuit and at least one pixel circuit. A driving circuit provides a driving signal for a pixel circuit. The driving circuit includes N-level shift registers cascaded with each other, where N is greater than or equal to two. A shift register includes at least one first active layer, and an active layer with a largest area is a first preset active layer. The pixel circuit includes at least one second active layer, where an active layer with a largest area among active layers containing silicon is a second preset active layer, and an active layer with a largest area among active layers containing oxide semiconductor is a third preset active layer. The first preset active layer has an area greater than the second preset active layer and the third preset active layer.
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公开(公告)号:US11830882B2
公开(公告)日:2023-11-28
申请号:US17452969
申请日:2021-10-29
Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.
Inventor: Qingjun Lai , Yihua Zhu , Yong Yuan , Ping An , Zhaokeng Cao
IPC: H01L27/12 , G09G3/3225 , H10K59/121
CPC classification number: H01L27/1237 , G09G3/3225 , H01L27/1251 , G09G2300/0426 , G09G2300/0465 , G09G2300/0814 , G09G2300/0842 , H01L27/1225 , H10K59/1213
Abstract: A display panel and a display device are provided in the present disclosure. The display panel includes a base substrate, a first transistor, a second transistor, a pixel circuit, and a drive circuit. A first active layer of the first transistor includes silicon; and a second active layer of the second transistor includes an oxide semiconductor. A length of a channel region of the first transistor is LL a distance between a first gate electrode and the first active layer is D1, and a first area S1=L1×D1; and a length of a channel region of the second transistor is L2, a distance between a second gate electrode and the second active layer is D2, and a second area S2=L2×D2, where S1
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公开(公告)号:US11615728B2
公开(公告)日:2023-03-28
申请号:US17878204
申请日:2022-08-01
Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.
Inventor: Yong Yuan
Abstract: Provided are a display panel and display device. The display panel includes a driver circuit, where the driver circuit includes an N-stage cascaded shift register which includes a first control unit, a second control unit, a third control unit, and a fourth control unit. The first control unit is configured to receive an input signal and control a signal of a first node in response to a first clock signal. The second control unit is configured to control a signal of a second node. The third control unit is configured to receive the first voltage signal and generate an output signal in response to a signal of a third node, or receive the second voltage signal and generate an output signal in response to the signal of the second node. The fourth control unit comprises a first capacitor and a first transistor.
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