公开(公告)号：US20160171273A1

公开(公告)日：2016-06-16

申请号：US14967153

申请日：2015-12-11

Applicant: XINTEC INC.

Inventor： Yen-Shih HO ,  Shu-Ming CHANG ,  Tsang-Yu LIU ,  Hsing-Lung SHEN

IPC: G06K9/00 ,  H01L21/48 ,  H01L23/498

CPC classification number: G06K9/0002 ,  G06F3/0414 ,  G06K9/00013 ,  H01L2224/141 ,  H01L2224/16225

Abstract: A chip package includes a substrate, a capacitive sensing layer and a computing chip. The substrate has a first surface and a second surface opposite to the first surface, and the capacitive sensing layer is disposed above the second surface and having a third surface opposite to the second surface, which the capacitive sensing layer includes a plurality of capacitive sensing electrodes and a plurality of metal wires. The capacitive sensing electrodes are on the second surface, and the metal wires are on the capacitive sensing electrodes. The computing chip is disposed above the third surface and electrically connected to the capacitive sensing electrodes.

Abstract translation: 芯片封装包括基板，电容感测层和计算芯片。 基板具有与第一表面相对的第一表面和第二表面，并且电容感测层设置在第二表面上方并且具有与第二表面相对的第三表面，电容感测层包括多个电容感测电极 和多根金属线。 电容感测电极位于第二表面上，并且金属线在电容感测电极上。 计算芯片设置在第三表面上方并电连接到电容感测电极。