公开(公告)号：US06355530B1

公开(公告)日：2002-03-12

申请号：US09630867

申请日：2000-08-02

申请人： James Ho ,  Cheng-Hui Chung ,  Chen-Bin Lin

发明人： James Ho ,  Cheng-Hui Chung ,  Chen-Bin Lin

IPC分类号： H01L218236

CPC分类号： H01L27/1126 ,  H01L27/112

摘要： A method of manufacturing a mask ROM. A sacrificial silicon oxide layer is formed on the active region upon the substrate. Patterning the sacrificial silicon oxide layer in order to form a plurality of parallel openings, thereby exposing a portion of the active region. A polysilicon layer is formed on the openings and openings are formed thereon. An ion implantation process is performed on the polysilicon layer. Using a thermal flow process, the ions within the polysilicon layer are driven through the openings into the lower portion of the substrate, thereby forming an ion doping region. The polysilicon layer is etchbacked until the sacrificial silicon oxide layer is exposed. The sacrificial silicon oxide layer is removed.

摘要翻译： 一种制造掩模ROM的方法。 在衬底上的有源区上形成牺牲氧化硅层。 对牺牲氧化硅层进行成形以便形成多个平行的开口，从而暴露一部分有源区。 在开口上形成多晶硅层，在其上形成开口。 在多晶硅层上进行离子注入工艺。 使用热流程，多晶硅层内的离子通过开口被驱动到衬底的下部，从而形成离子掺杂区域。 蚀刻多晶硅层直到牺牲氧化硅层露出。 去除牺牲氧化硅层。

公开(公告)号：US06906364B2

公开(公告)日：2005-06-14

申请号：US09892419

申请日：2001-06-26

申请人： Chong-Yao Chen ,  Chen-Bin Lin ,  Feng-Ming Liu

发明人： Chong-Yao Chen ,  Chen-Bin Lin ,  Feng-Ming Liu

IPC分类号： H01L27/146 ,  H01L31/062 ,  H01L31/113 ,  H04N1/04

CPC分类号： H01L27/14643 ,  H01L27/14609

摘要： A structure of a CMOS image sensory device is described. A photodiode sensory region and a transistor device region are isolated from each other by an isolation layer formed in the substrate. A gate structure is located on the transistor device region, and a source/drain region is in the transistor device region beside the side of the gate structure. A doped region is in the photodiode sensory region. A self-aligned block is located on the photodiode sensory region and a protective layer is formed on the entire substrate.

摘要翻译： 描述CMOS图像感测装置的结构。 光电二极管感应区域和晶体管器件区域通过形成在衬底中的隔离层彼此隔离。 栅极结构位于晶体管器件区域上，源极/漏极区域位于栅极结构侧面旁边的晶体管器件区域中。 掺杂区域在光电二极管的感觉区域中。 自对准块位于光电二极管感应区上，在整个基板上形成保护层。

公开(公告)号：US06303406B1

公开(公告)日：2001-10-16

申请号：US09590722

申请日：2000-06-08

申请人： Chong-Yao Chen ,  Chen-Bin Lin ,  Feng-Ming Liu

发明人： Chong-Yao Chen ,  Chen-Bin Lin ,  Feng-Ming Liu

IPC分类号： H01L2100

CPC分类号： H01L31/02162 ,  H01L27/14621 ,  H01L27/14636 ,  H01L29/665 ,  H01L31/02161

摘要： The present invention is a method for integrating an anti-reflection layer and a salicide block. The method comprises following steps: provide a substrate that is divided into at least a sensor area and a transistor area, wherein the sensor area comprises a doped region and the transistor area comprises a transistor that includes a gate, a source and a drain; forms a composite layer on the substrate, herein the composite layer at least also covers both sensor area and transistor area, and the composite layer increases refractive index of light that propagate from the doped region into the composite layer; performs an etching process and a photolithography process to remove part of the composite layer and to let top of the gate, the source and the drain are not covered by the composite layer; and performs a salicide process to let top of the gate, the source and the drain are covered by a silicate. One main characteristic of the invention is that the composite layer can be used as an anti-reflection layer of the sensor area and a salicide block of the transistor region. The composite layer is made of several basic layers and refractive index of any basic layer is different to refractive indexes of adjacent basic layers.

摘要翻译： 本发明是一种用于整合抗反射层和自对准硅化物块的方法。 该方法包括以下步骤：提供被分成至少传感器区域和晶体管区域的衬底，其中传感器区域包括掺杂区域，并且晶体管区域包括包括栅极，源极和漏极的晶体管; 在衬底上形成复合层，这里复合层至少还覆盖传感器面积和晶体管面积，并且复合层增加了从掺杂区域传播到复合层中的光的折射率; 进行蚀刻处理和光刻处理以去除复合层的一部分，并使栅极顶部，源极和漏极不被复合层覆盖; 并执行自对准处理以使顶部的栅极，源极和漏极被硅酸盐覆盖。 本发明的一个主要特征是复合层可以用作传感器区域的防反射层和晶体管区域的自对准硅化物块。 复合层由几层基本层组成，任何基层的折射率与相邻基层的折射率不同。

公开(公告)号：US06507059B2

公开(公告)日：2003-01-14

申请号：US09885467

申请日：2001-06-19

申请人： Chong-Yao Chen ,  Chen-Bin Lin

发明人： Chong-Yao Chen ,  Chen-Bin Lin

IPC分类号： H01L31113

CPC分类号： H01L27/14689 ,  H01L27/14609

摘要： A method of fabricating CMOS image sensor. On a substrate, an isolation layer is formed to partition the substrate into a photodiode sensing region and a transistor element region. Next, on the transistor element region, a gate electrode structure is formed and then, a source/drain region is formed at the transistor element region of the two lateral sides of the gate electrode structure. At the same time, a doping region is formed on the photodiode sensing region. After that, a self-aligned barrier layer is formed on the photodiode sensing region and a protective layer is formed on the substrate. Then, a dielectric layer and a metallic conductive wire are successively formed on the protective layer. Again, a protective layer is formed on the dielectric layer and the metallic conductive wire, wherein the numbers of the dielectric layers and the metallic conductive wire depend on the fabrication process. A protective layer is formed between every dielectric layer.

摘要翻译： 一种制造CMOS图像传感器的方法。 在衬底上形成隔离层以将衬底分隔成光电二极管感测区域和晶体管元件区域。 接着，在晶体管元件区域上形成栅电极结构，然后在栅电极结构的两个侧面的晶体管元件区域形成源/漏区。 同时，在光电二极管感测区域上形成掺杂区域。 之后，在光电二极管感测区域上形成自对准势垒层，在衬底上形成保护层。 然后，在保护层上依次形成电介质层和金属导电线。 再次，在电介质层和金属导线上形成保护层，其中介电层和金属导线的数量取决于制造工艺。 在每个介电层之间形成保护层。

公开(公告)号：US06479317B2

公开(公告)日：2002-11-12

申请号：US09975618

申请日：2001-10-11

申请人： Chong-Yao Chen ,  Chen-Bin Lin ,  Feng-Ming Liu

发明人： Chong-Yao Chen ,  Chen-Bin Lin ,  Feng-Ming Liu

IPC分类号： H01L2100

CPC分类号： H01L31/02162 ,  H01L27/14621 ,  H01L27/14636 ,  H01L29/665 ,  H01L31/02161

摘要： The present invention is a method for integrating an anti-reflection layer and a salicide block. The method comprises the following steps: A substrate is provided that is divided into at least a sensor area and a transistor area, wherein the sensor area comprises a doped region and the transistor area comprises a transistor that includes a gate, a source and a drain; forming a composite layer on the substrate, wherein the composite layer at least also covers both the sensor area and the transistor area, and the composite layer increases the refractive index of light that propagates from the doped region into the composite layer; performing an etching process and a photolithography process to remove part of the composite layer and to let top of the gate, the source and the drain are not covered by the composite layer; and performing a salicide process to let top of the gate, the source and the drain are covered by a silicate. One main characteristic of the invention is that the composite layer can be used as an anti-reflection layer of the sensor area and a salicide block of the transistor region. The composite layer is made of several basic layers and refractive index of any basic layer is different from refractive indexes of adjacent basic layers.

摘要翻译： 本发明是一种用于整合抗反射层和自对准硅化物块的方法。 该方法包括以下步骤：提供被分成至少传感器区域和晶体管区域的衬底，其中传感器区域包括掺杂区域，并且晶体管区域包括晶体管，晶体管包括栅极，源极和漏极 ; 在所述基板上形成复合层，其中所述复合层至少还覆盖所述传感器区域和所述晶体管区域，并且所述复合层增加从所述掺杂区域传播到所述复合层中的光的折射率; 执行蚀刻工艺和光刻工艺以去除复合层的一部分，并使栅极顶部，源极和漏极不被复合层覆盖; 并且执行自对准处理以使浇口的顶部，源和漏被硅酸盐覆盖。 本发明的一个主要特征是复合层可以用作传感器区域的防反射层和晶体管区域的自对准硅化物块。 复合层由若干基本层构成，任何基层的折射率与相邻基层的折射率不同。