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    Outer encoder and outer encoding method thereof
    20.
    发明授权
    Outer encoder and outer encoding method thereof 有权
    外编码器及其外编码方法

    公开(公告)号：US07930618B2

    公开(公告)日：2011-04-19

    申请号：US11504029

    申请日：2006-08-15

    申请人： Jung-pil Yu ,  Hae-joo Jeong ,  Eui-jun Park ,  Joon-soo Kim ,  Yong-sik Kwon ,  Jin-Hee Jeong ,  Yong-deok Chang ,  Kum-ran Ji ,  Jong-hun Kim

    发明人： Jung-pil Yu ,  Hae-joo Jeong ,  Eui-jun Park ,  Joon-soo Kim ,  Yong-sik Kwon ,  Jin-Hee Jeong ,  Yong-deok Chang ,  Kum-ran Ji ,  Jong-hun Kim

    IPC分类号： H03M13/00

    CPC分类号： H04N21/4382 ,  H03M13/2903 ,  H03M13/2957 ,  H03M13/356 ,  H03M13/6538 ,  H04L1/0041 ,  H04L1/0043 ,  H04L1/0059 ,  H04L1/0065 ,  H04L1/0067 ,  H04L1/007 ,  H04L1/0083 ,  H04N21/234327 ,  H04N21/2383 ,  H04N21/631

    摘要： An outer encoder includes a bit detector that receives a turbo stream provided with a parity insertion region and that detects data bits from the turbo stream, an encoder that convolution-encodes the detected data bits, and a bit inserter that inserts an encoded value outputted from the encoder into the parity insertion region in the turbo stream. The encoder includes a first register; a second register, in which when a bit value is stored in the first register, a stored value pre-stored in the first register is shifted and stored; a third register, in which when a bit value is stored in the second register, a stored value pre-stored in the second register is shifted and stored; a first adder adding the input bit value, the stored value pre-stored in the first register, and the stored value pre-stored in the third register, and storing the resultant value of addition in the first register, if a specified bit is inputted; and a second adder adding the input bit value, the stored value pre-stored in the first register, and the stored value pre-stored in the second register to output the resultant value of addition. Accordingly, only the turbo stream in the dual transport stream is robustly processed.

    摘要翻译： 外部编码器包括：位检测器，其接收设置有奇偶校验插入区域并且从turbo流检测数据位的turbo流;对所检测到的数据位进行卷积编码的编码器;以及插入从 编码器进入turbo流中的奇偶校验插入区域。 编码器包括第一寄存器; 第二寄存器，其中当位值存储在第一寄存器中时，预先存储在第一寄存器中的存储值被移位并存储; 第三寄存器，其中当位值存储在第二寄存器中时，预存储在第二寄存器中的存储值被移位并存储; 如果输入了指定的位，第一加法器将预先存储在第一寄存器中的存储值和预先存储在第三寄存器中的存储值相加，并将加法结果存储在第一寄存器中， ; 以及第二加法器，将输入比特值，预先存储在第一寄存器中的存储值和预先存储在第二寄存器中的存储值相加，以输出所得到的加法值。 因此，只有双传输流中的turbo流被鲁棒地处理。