Power savings in a content addressable memory device using masked pre-compare operations

    公开(公告)号:US08619451B1

    公开(公告)日:2013-12-31

    申请号:US13345128

    申请日:2012-01-06

    Inventor: Dimitri Argyres

    CPC classification number: G11C5/14 G11C15/00

    Abstract: A CAM device for comparing a search key with a plurality of ternary words stored in a CAM array includes one or more population counters, a pre-compare memory, and a pre-compare circuit. The present embodiments reduce the power consumption of CAM devices during compare operations between a search key and ternary words stored in a CAM array by selectively enabling the match lines in the CAM array in response to pre-compare operations between a set of population counts corresponding to the masked search key and a set of population counts corresponding to the ternary words stored in the CAM array.

    Ternary content addressable memory cell having two transistor pull-down stack
    12.
    发明授权
    Ternary content addressable memory cell having two transistor pull-down stack 失效
    具有两个晶体管下拉叠层的三元内容可寻址存储单元

    公开(公告)号:US08553441B1

    公开(公告)日:2013-10-08

    申请号:US13149885

    申请日:2011-05-31

    Inventor: Dimitri Argyres

    CPC classification number: G11C15/04

    Abstract: Ternary CAM cells include a compare circuit including a discharge path having only two pull-down transistors coupled between the match line and ground potential.

    Abstract translation: 三进制CAM单元包括比较电路,其包括仅在匹配线和地电位之间耦合的两个下拉晶体管的放电路径。

    Advanced telecommunications router and crossbar switch controller
    13.
    发明授权
    Advanced telecommunications router and crossbar switch controller 有权
    先进的电信路由器和交叉开关控制器

    公开(公告)号:US08514873B2

    公开(公告)日:2013-08-20

    申请号:US12890551

    申请日:2010-09-24

    CPC classification number: H04L49/25 H04L49/101 H04L49/3027 H04L49/3045

    Abstract: An apparatus and method to receive first service request signals and second service request signals from virtual signal queues, to map the virtual signal queues according to a first mapping, to arbitrate the first service request signals in accordance with the first mapping of the virtual signal queues, and to re-map the virtual signal queues according to a second mapping, different from the first mapping, to allow arbitrating of the second service request signals in accordance with the second mapping of the virtual signal queues.

    Abstract translation: 一种从虚拟信号队列接收第一服务请求信号和第二服务请求信号的装置和方法,以根据第一映射映射虚拟信号队列,以根据虚拟信号队列的第一映射来仲裁第一服务请求信号 并且根据与第一映射不同的第二映射来重新映射虚拟信号队列,以允许根据虚拟信号队列的第二映射来仲裁第二服务请求信号。

    Crest factor reduction with phase optimization
    14.
    发明授权
    Crest factor reduction with phase optimization 失效
    波峰因数降低与相位优化

    公开(公告)号:US08509345B2

    公开(公告)日:2013-08-13

    申请号:US12455952

    申请日:2009-06-09

    Inventor: Farrokh Farrokhi

    CPC classification number: H04L27/2621

    Abstract: A system for reducing peaks comprises a processor and a memory. The processor is configured to determine phase offsets for a plurality of input signals. The phase offsets are determined using trials of phase offsets to determine a selected set of phase offsets. The processor is further configured to modulate the input data signals using the selected set of phase offsets to produce modulated phase offset data signals and to generate a sum of modulated phase offset data signals, such that the sum has a lower peak value as compared to the sum not using the selected set of phase offset signals.

    Abstract translation: 用于降低峰值的系统包括处理器和存储器。 处理器被配置为确定多个输入信号的相位偏移。 使用相位偏移的试验来确定相位偏移,以确定所选择的一组相位偏移。 处理器还被配置为使用所选择的相位偏移组来调制输入数据信号,以产生调制的相位偏移数据信号,并产生调制的相位偏移数据信号的和,使得与具有较低峰值的和 总和不使用所选择的一组相位偏移信号。

    System and method for adaptive nonlinear filtering

    公开(公告)号:US08380773B2

    公开(公告)日:2013-02-19

    申请号:US12286733

    申请日:2008-09-30

    Applicant: Roy G. Batruni

    Inventor: Roy G. Batruni

    CPC classification number: H03H17/0261 H03H21/0016

    Abstract: An adaptive nonlinear filtering system includes an adaptive filter module that is configured to generate relative location information pertaining to a relative location of an input signal within an input range; determine an input dependent filter parameter based at least in part on the relative location information; generate an output signal based at least in part on the input dependent filter parameter; and feed back a feedback signal that is generated based at least in part on the output signal and a target signal.

    CONTENT ADDRESSABLE MEMORY (CAM) DEVICE AND METHOD FOR UPDATING DATA
    17.
    发明申请
    CONTENT ADDRESSABLE MEMORY (CAM) DEVICE AND METHOD FOR UPDATING DATA 有权
    内容可寻址存储器(CAM)用于更新数据的设备和方法

    公开(公告)号:US20120324158A1

    公开(公告)日:2012-12-20

    申请号:US13596495

    申请日:2012-08-28

    Applicant: Scott SMITH

    Inventor: Scott SMITH

    CPC classification number: G11C15/00

    Abstract: A content addressable memory (CAM) (100) can include a CAM memory array (102) having both a data field (102-0) and a mask field (102-1). A multiplexer (MUX) (108) can selectively load data from either a register (104) or an external data input (106) to one or both fields (102-0 and 102-1) of CAM memory array (102).

    Abstract translation: 内容可寻址存储器(CAM)(100)可以包括具有数据字段(102-0)和掩码字段(102-1)两者的CAM存储器阵列(102)。 复用器(MUX)(108)可以选择性地将数据从寄存器(104)或外部数据输入(106)加载到CAM存储器阵列(102)的一个或两个场(102-0和102-1)。

    Delay line correlator
    18.
    再颁专利
    Delay line correlator 有权
    延迟线相关器

    公开(公告)号:USRE43790E1

    公开(公告)日:2012-11-06

    申请号:US13373475

    申请日:2011-10-05

    Abstract: A circuit for the analog correlation of a 2.5 GHz signal to remove impairments such as echo, cross talk and intersymbol interference is described. Loop stability in a loop which generates an error signal and tap weights is achieved by providing a further delay from the taps of the delay line.

    Abstract translation: 描述用于2.5GHz信号的模拟相关性以消除诸如回声,串扰和符号间干扰的损伤的电路。 通过从延迟线的抽头提供进一步的延迟来实现产生误差信号和抽头权重的环路中的环路稳定性。

    Model based distortion reduction for power amplifiers

    公开(公告)号:US08248159B2

    公开(公告)日:2012-08-21

    申请号:US12658498

    申请日:2010-02-09

    Applicant: Roy G. Batruni

    Inventor: Roy G. Batruni

    CPC classification number: H03F1/0288 H03F1/32 H03F1/3247 H03F2200/321

    Abstract: A method of processing a signal is disclosed. The method comprises generating a digital signal, converting the digital signal to an analog signal, and generating an amplified analog signal having distortions. The method further comprises converting the amplified analog signal to a feedback digital signal at a sample rate and updating a model of the distortions based on the feedback digital signal.

    Block mapping circuit and method for memory device
    20.
    发明授权
    Block mapping circuit and method for memory device 失效
    块映射电路和存储器件的方法

    公开(公告)号:US08230167B1

    公开(公告)日:2012-07-24

    申请号:US11478234

    申请日:2006-06-29

    CPC classification number: G11C29/816 G11C15/00

    Abstract: A method of mapping logical block select signals to physical blocks can include receiving at least one signal for each of n+1 logical blocks, where n is an integer greater than one, that each map to one of m+1 physical blocks, where n

    Abstract translation: 将逻辑块选择信号映射到物理块的方法可以包括为n + 1个逻辑块中的每一个接收至少一个信号,其中n是大于1的整数,每个映射到m + 1个物理块之一,其中n

Patent Agency Ranking