公开(公告)号：US09919917B2

公开(公告)日：2018-03-20

申请号：US14514356

申请日：2014-10-14

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Jong Woon Kim ,  Won Kyu Jeung

IPC: B81C1/00 ,  G01P15/08 ,  G01P15/09 ,  G01P15/18 ,  G01C19/56 ,  B81B3/00 ,  C09K13/08 ,  C09K13/00

CPC classification number: B81C1/00158 ,  B81B3/0062 ,  B81B3/007 ,  B81B2201/0235 ,  B81B2203/053 ,  B81C1/00484 ,  B81C1/00531 ,  B81C1/00539 ,  B81C1/00571 ,  B81C2201/01 ,  B81C2201/0132 ,  B81C2201/0133 ,  B81C2201/014 ,  C09K13/00 ,  C09K13/08 ,  G01C19/56 ,  G01P15/0802 ,  G01P15/0922 ,  G01P15/18 ,  G01P2015/084 ,  G01P2015/0871

Abstract: Disclosed herein an inertial sensor and a method of manufacturing the same. An inertial sensor 100 according to a preferred embodiment of the present invention is configured to include a plate-shaped membrane 110, a mass body 120 that includes an adhesive part 123 disposed under a central portion 113 of the membrane 110 and provided at the central portion thereof and a patterning part 125 provided at an outer side of the adhesive part 123 and patterned to vertically penetrate therethrough, and a first adhesive layer 130 that is formed between the membrane 110 and the adhesive part 123 and is provided at an inner side of the patterning part 125. An area of the first adhesive layer 130 is narrow by isotropic etching using the patterning part 125 as a mask, thereby making it possible to improve sensitivity of the inertial sensor 100.

公开(公告)号：US09029178B2

公开(公告)日：2015-05-12

申请号：US14355770

申请日：2012-11-08

Applicant: Commissariat a l'Energie Atomique et Aux Ene Alt

Inventor： Vincent Larrey ,  Jean-Philippe Polizzi

IPC: H01L21/00 ,  B81C1/00 ,  B06B1/02 ,  G01D5/02

CPC classification number: B81C1/00158 ,  B06B1/0292 ,  B81B2203/0307 ,  B81C1/00039 ,  B81C2201/01 ,  G01D5/02

Abstract: A method for producing a device including plural cavities defined between a substrate in at least one given semiconductor material and a membrane resting on a top of insulating posts projecting from the substrate, the method allowing a height of the cavity or cavities to be adapted independently of a height of the insulating posts and allowing cavities of different heights to be formed.

Abstract translation: 一种用于制造装置的方法，所述装置包括限定在至少一个给定半导体材料中的基板和搁置在从所述基板突出的绝缘柱的顶部上的膜之间的多个空腔，所述方法允许所述空腔或空腔的高度独立于 绝缘柱的高度和允许形成不同高度的空腔。

公开(公告)号：US20140295606A1

公开(公告)日：2014-10-02

申请号：US14355770

申请日：2012-11-08

Applicant: Commissariat a l'energie atomique et aux ene alt

Inventor： Vincent Larrey ,  Jean-Philippe Polizzi

IPC: B81C1/00 ,  G01D5/02

CPC classification number: B81C1/00158 ,  B06B1/0292 ,  B81B2203/0307 ,  B81C1/00039 ,  B81C2201/01 ,  G01D5/02

Abstract: A method for producing a device including plural cavities defined between a substrate in at least one given semiconductor material and a membrane resting on a top of insulating posts projecting from the substrate, the method allowing a height of the cavity or cavities to be adapted independently of a height of the insulating posts and allowing cavities of different heights to be formed.

Abstract translation: 一种用于制造装置的方法，所述装置包括限定在至少一个给定半导体材料中的基板和搁置在从所述基板突出的绝缘柱的顶部上的膜之间的多个空腔，所述方法允许所述空腔或空腔的高度独立于 绝缘柱的高度和允许形成不同高度的空腔。