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公开(公告)号：US20090096504A1
公开(公告)日：2009-04-16
申请号：US12285581
申请日：2008-10-09
Applicant: Kazushi Matsuo , Toshihiko Matsuoka , Hideaki Ishihara
Inventor： Kazushi Matsuo , Toshihiko Matsuoka , Hideaki Ishihara
IPC: H03K3/011
Abstract: A data reception apparatus includes: an oscillation circuit that multiplies or divides an oscillation signal from a CR oscillator based on a cycle setting value, and outputs a clock signal corresponding to the multiplied or divided oscillation signal; a temperature detector; a memory; a clock cycle setting element that reads the cycle setting value corresponding to the temperature from the memory, and inputs the cycle setting value into the oscillation circuit; a receiver that receives a data signal defined by the clock signal; a measurement element that measures a unit bit length of the data signal by counting the clock signal; and a correction element that corrects the cycle setting value based on a count value of the clock signal and a reference count value of a reference cycle corresponding to the unit bit length, and rewrites the cycle setting value with the corrected cycle setting value.
Abstract translation: 数据接收装置包括：振荡电路，其根据周期设定值对来自CR振荡器的振荡信号进行倍数或分频，并输出与所乘的或分频的振荡信号对应的时钟信号; 温度检测器; 记忆 时钟周期设定元件，其从存储器读取与温度对应的周期设定值，并将该周期设定值输入到振荡电路中; 接收器，接收由时钟信号定义的数据信号; 测量元件，通过对时钟信号进行计数来测量数据信号的单位比特长度; 以及校正元件，其基于时钟信号的计数值和与单位比特长度对应的基准周期的基准计数值来校正周期设定值，并且以修正的周期设定值重写周期设定值。
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公开(公告)号：US20080106348A1
公开(公告)日：2008-05-08
申请号：US11984970
申请日：2007-11-26
Applicant: Jarkko Routama , Klaus Turhanen
Inventor： Jarkko Routama , Klaus Turhanen
CPC classification number: H03L1/025
Abstract: The present invention relates to an integrated circuit for a temperature compensated crystal oscillator having an external crystal. The integrated circuit comprises a temperature compensation having one fixed or at least two selectable 3rd and/or 4th and/or 5th and/or higher order temperature compensation functions for at least one specific type of external crystal. The temperature compensation can be calibrated at one temperature, in other words without use of temperature variation, by means of an external voltage or current source overdriving a respective temperature-dependent voltage or current supplied from an internal temperature sensor to the temperature compensation.
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13.发明申请DFY of XtalCIkChip: design for yield of trimming-free crystal-free precision reference clock oscillator IC chip 有权XtalCIkChip的DFY：无微调无晶振精密基准时钟振荡器IC芯片的产量设计公开(公告)号：US20080042766A1
公开(公告)日：2008-02-21
申请号：US11593271
申请日：2006-11-06
Applicant: Min Ming Tarng , Minh V. Nguyen , Eric Yu-Shiao Tarng
Inventor： Min Ming Tarng , Minh V. Nguyen , Eric Yu-Shiao Tarng
IPC: H03B5/08
CPC classification number: H03B5/04 , H03B5/1215 , H03B5/1228 , H03B5/1253 , H03B5/1278 , H03B5/366 , H03B2200/0074 , H03H9/173 , H03H9/545 , H03L1/025 , H03L7/18 , H03L7/1976
Abstract: A Design For Yield (DFY) of Crystal Chip (XtalChip) is to have the high yield of high quality high accurate clock chip to be able to integrated in the SOC environment to save the production cost and board space, etc. The LC oscillation (LCO) tank has the constant oscillation amplitude control, constant oscillation common mode voltage, and inductor parametric resistance compensation over temperature and oscillation glitch filter capacitors.
Abstract translation: 晶体芯片（XtalChip）的产量设计（DFY）是高品质的高精度时钟芯片，能够集成到SOC环境中，以节省生产成本和电路板空间等。LC振荡（ LCO）储罐具有恒定振荡幅度控制，恒定振荡共模电压，以及电感参数电阻补偿温度和振荡毛刺滤波电容。
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14.发明申请XtalClkChip: trimming-free crystal-free precision reference clock oscillator IC chip 有权XtalClkChip：微调无晶振的精密基准时钟振荡器IC芯片公开(公告)号：US20080042765A1
公开(公告)日：2008-02-21
申请号：US11500125
申请日：2006-08-05
Applicant: Min Ming Tarng , Minh V. Nguyen , Eric Yu-Shiao Tarng
Inventor： Min Ming Tarng , Minh V. Nguyen , Eric Yu-Shiao Tarng
IPC: H03B5/08
CPC classification number: H03B5/366 , H03B5/04 , H03B5/1212 , H03B5/1228 , H03B5/124 , H03H9/173 , H03H9/545 , H03L1/025 , H03L7/18 , H03L7/1976
Abstract: A XtalClkChip based on the application of hierarchical circuit and noise circuit design on the RF circuits of LC oscillation tank and the multi-phase fractional PLL are developed. The XtalClkChip combines both the XtalChip and multi-phase fractional PLL to provide the customer's clock to customer directly. This XtalChip will replace the crystal and the crystal circuit. The XtalClkChip will replace all the customer's clock circuit.
Abstract translation: 基于在LC振荡槽和多相分数PLL的RF电路上应用分级电路和噪声电路设计的XtalClkChip被开发。 XtalClkChip结合了XtalChip和多相分数PLL，可以直接向客户提供时钟。 该XtalChip将取代晶体和晶体电路。 XtalClkChip将取代所有客户的时钟电路。
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公开(公告)号：US20060250193A1
公开(公告)日：2006-11-09
申请号：US11484426
申请日：2006-07-11
Applicant: Dominik Schmidt
Inventor： Dominik Schmidt
IPC: H03B5/32
Abstract: A clock oscillator embedded in an integrated circuit, including a piezoelectric resonator formed on the integrated circuit; a clock generator coupled to the on-chip piezoelectric resonator; one or more sensors adapted to sense one or more environmental parameters affecting the piezoelectric resonator; and a processor coupled to the clock generator and the one or more sensors to adjust the frequency of the clock generator based on the one or more environmental parameters.
Abstract translation: 嵌入在集成电路中的时钟振荡器，包括形成在集成电路上的压电谐振器; 耦合到所述片上压电谐振器的时钟发生器; 适于感测影响压电谐振器的一个或多个环境参数的一个或多个传感器; 以及处理器，其耦合到所述时钟发生器和所述一个或多个传感器，以基于所述一个或多个环境参数来调整所述时钟发生器的频率。
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Patent Agency Ranking
公开(公告)号：US06946919B2
公开(公告)日：2005-09-20
申请号：US10047249
申请日：2002-01-14
Applicant: Thomas Knecht , Marlin Luff , Steven J. Fry
Inventor： Thomas Knecht , Marlin Luff , Steven J. Fry
CPC classification number: H03L7/18 , H01L2224/16 , H01L2924/01019 , H01L2924/01046 , H01L2924/01079 , H01L2924/13091 , H01L2924/1627 , H01L2924/3011 , H03L1/025 , H03L7/099
Abstract: A frequency-adjustable oscillator suitable for digital signal clock synchronization comprises a crystal oscillator circuit for generating a driving signal and having a voltage-variable control input for adjusting a frequency of the driving signal, a phase detector circuit for generating a phase offset signal, a filter which operates on the phase offset signal to produce a VCO control signal, a voltage controlled oscillator circuit operably linked to the filter and responsive to the VCO control signal for generating an analog controlled-frequency signal, a frequency divider circuit for generating a reduced frequency feedback signal in response to the controlled-frequency signal. The frequency-adjustable oscillator also includes a double-sided package including a platform having a central portion and an outer portion with sidewalls extending substantially upwardly and substantially downwardly from the outer portion of the platform. The upwardly extending sidewalls and the platform form a first cavity adapted to receive and electrically connect the quartz resonator. The downwardly extending sidewalls and the platform forming a second cavity adapted to receive and electrically connect at least one electronic component. A cover is coupled with the first cavity to create an isolated environment for containing the quartz resonator.
Abstract translation: 适用于数字信号时钟同步的频率可调振荡器包括用于产生驱动信号并具有用于调节驱动信号的频率的电压可变控制输入的晶体振荡器电路，用于产生相位偏移信号的相位检测器电路， 滤波器，其对相位偏移信号进行操作以产生VCO控制信号;压控振荡器电路，其可操作地连接到所述滤波器并响应于所述VCO控制信号以产生模拟受控频率信号;分频器电路，用于产生降频 响应于受控频率信号的反馈信号。 频率可调节振荡器还包括双面封装，其包括具有中心部分的平台和具有从平台的外部部分基本向上且基本向下延伸的侧壁的外部部分。 向上延伸的侧壁和平台形成适于接收和电连接石英谐振器的第一腔。 向下延伸的侧壁和平台形成适于接收和电连接至少一个电子部件的第二腔。 盖与第一腔结合以产生用于容纳石英谐振器的隔离环境。
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公开(公告)号：US20050122182A1
公开(公告)日：2005-06-09
申请号：US10728382
申请日：2003-12-05
Applicant: Chung Yao
Inventor： Chung Yao
Abstract: The present self-calibratable oscillating device includes a phase comparator, a clock pad electrically connected to a first input port of the phase comparator, a crystal oscillator electrically connected to a second input port of the phase comparator, an analog/digital converter electrically connected to an output port of the phase comparator, and a memory electrically connected to an output port of the analog/digital converter. The crystal oscillator can be a temperature-compensated crystal oscillator or a surface acoustic wave crystal oscillator. The present self-calibratable oscillating device can further includes a first switch positioned between the first input port of the phase comparator and the clock pad, a second switch positioned between the crystal oscillator and the clock pad wherein the stream direction of the first switch is in reverse of that of the second switch, and a logic control device for controlling the first switch and the second switch.
Abstract translation: 本自动校准振荡装置包括相位比较器，电连接到相位比较器的第一输入端口的时钟衬垫，电连接到相位比较器的第二输入端口的晶体振荡器，电连接到 相位比较器的输出端口和电连接到模/数转换器的输出端口的存储器。 晶体振荡器可以是温度补偿晶体振荡器或表面声波晶体振荡器。 本自动校准振荡装置还可以包括位于相位比较器的第一输入端口和时钟衬垫之间的第一开关，位于晶体振荡器和时钟衬垫之间的第二开关，其中第一开关的流动方向处于 与第二开关的相反，以及用于控制第一开关和第二开关的逻辑控制装置。
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公开(公告)号：US20040071029A1
公开(公告)日：2004-04-15
申请号：US10272247
申请日：2002-10-15
Inventor： Sehat Sutardja
IPC: G11C007/04
Abstract: A device for generating an output signal having a frequency. The device having a die temperature and including a first temperature sensor to sense a first temperature. A non-volatile memory to store calibration information for controlling the output signal frequency as a function of the first temperature. A semiconductor oscillator to generate the output signal as a function of the calibration information.
Abstract translation: 一种用于产生具有频率的输出信号的装置。 所述装置具有管芯温度并且包括用于感测第一温度的第一温度传感器。 一种用于存储用于控制作为第一温度的函数的输出信号频率的校准信息的非易失性存储器。 一个半导体振荡器，用于根据校准信息产生输出信号。
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19.发明授权Cavity design printed circuit board for a temperature compensated crystal oscillator and a temperature compensated crystal oscillator employing the same 失效用于温度补偿晶体振荡器的腔设计印刷电路板和采用该晶体振荡器的温度补偿晶体振荡器公开(公告)号：US06664864B2
公开(公告)日：2003-12-16
申请号：US10004276
申请日：2001-10-31
Applicant: Mekell Jiles , Vladimir Telemaque , Eileen Bartley
Inventor： Mekell Jiles , Vladimir Telemaque , Eileen Bartley
IPC: H03L100
CPC classification number: H03L1/025 , H01L23/5386 , H01L24/97 , H01L2924/14 , H03B5/04 , H03L1/028 , H05K1/0237 , H05K1/183 , H05K3/403 , H05K3/4611 , H05K3/4697 , H05K2201/09181 , H01L2924/00
Abstract: A frequency controlled oscillator (100) is manufactured using an array (200) of mechanically interconnected oscillator bases (110) having component cavities (130) and wiring patterns therein. A frequency control component (120) serves as a cover for a cavity within the array, and in addition is electrically connected to oscillator components (140, 150) mounted within the cavity to regulate the frequency of electrical oscillation. Both the oscillator bases and finished oscillators may be tested while still in the array, prior to being separated from each other. In a most preferred embodiment, the array of oscillator bases are manufactured from a polymeric sheet material laminated with electrically conductive traces. The polymeric sheet material is selectively punched or formed prior to lamination so that intermediate and upper layers (112, 113) have predetermined sections removed. These removed sections will align with adjacent layers to form the component cavity from intermediate the top and bottom to the top of the finished laminate.
Abstract translation: 频率控制振荡器（100）使用机械互连的振荡器基座（110）的阵列（200）制造，所述振荡器基座（110）具有组件空腔（130）和其中的布线图案。 频率控制部件（120）用作阵列内的空腔的盖子，并且还与安装在腔体内的振荡器部件（140,150）电连接，以调节电振荡的频率。 在彼此分离之前，振荡器基座和完成的振荡器都可以在阵列中被测试。 在最优选的实施例中，振荡器基座的阵列由层叠有导电迹线的聚合物片材制成。 在层压之前选择性地冲压或形成聚合物片材，使得中间层和上层（112,113）具有去除的预定部分。 这些去除的部分将与相邻的层对准以从成品层压板的顶部和底部到顶部的中间形成部件空腔。
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公开(公告)号：US06661295B2
公开(公告)日：2003-12-09
申请号：US09829129
申请日：2001-04-09
Applicant: Thomas Knecht , Steven J. Fry , Richard Sutliff
Inventor： Thomas Knecht , Steven J. Fry , Richard Sutliff
IPC: H03L700
Abstract: A frequency-adjustable oscillator suitable for digital signal clock synchronization comprises a crystal oscillator circuit for generating a driving signal and having a voltage-variable control input for adjusting a frequency of the driving signal, a phase detector circuit for generating a phase offset signal, a filter which operates on the phase offset signal to produce a VCO control signal, a voltage controlled oscillator circuit operably linked to the filter and responsive to the VCO control signal for generating an analog controlled-frequency signal, a frequency divider circuit for generating a reduced frequency feedback signal in response to the controlled-frequency signal, and a sinewave-to-logic level translator circuit for generating a digital output signal having substantially the same frequency as the controlled-frequency signal. The crystal oscillator circuit includes a discrete varactor responsive to the control input and a fundamental mode AT-cut quartz resonator. The frequency-adjustable oscillator operates according to specific operating output frequency to control input relationship.
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