公开(公告)号：US20210225283A1

公开(公告)日：2021-07-22

申请号：US17222844

申请日：2021-04-05

Applicant: Apple Inc.

Inventor： Chin-Wei Lin ,  Hung Sheng Lin ,  Shih Chang Chang ,  Shinya Ono

IPC: G09G3/3233 ,  H01L29/786 ,  G09G3/3266 ,  G09G3/3275 ,  H01L27/12

Abstract: A display may have an array of pixels each of which has a light-emitting diode such as an organic light-emitting diode. A drive transistor and an emission transistor may be coupled in series with the light-emitting diode of each pixel between a positive power supply and a ground power supply. The pixels may include first and second switching transistors. A data storage capacitor may be coupled between a gate and source of the drive transistor in each pixel. Signal lines may be provided in columns of pixels to route signals such as data signals, sensed drive currents from the drive transistors, and predetermined voltages between display driver circuitry and the pixels. The switching transistors, emission transistors, and drive transistors may include semiconducting-oxide transistors and silicon transistors and may be n-channel transistors or p-channel transistors.

公开(公告)号：US10923022B2

公开(公告)日：2021-02-16

申请号：US16692933

申请日：2019-11-22

Applicant: Apple Inc.

Inventor： Chin-Wei Lin ,  Fan Gui ,  Gihoon Choo

IPC: G09G3/296 ,  H03K19/00

Abstract: A display is provided that includes an array of display pixels that receive data signals from display driver circuitry and that receive control signals from gate driver circuitry. The gate driver circuitry may include a chain of row driver circuits. Each row driver circuit in the chain of row driver circuits may include a master driver stage, a slave driver stage, and associated control circuitry configured to receive a clock signal and a pulse signal from a preceding row driver in the chain. The master driver stage may be biased using fixed nominal power supply voltages, whereas the slave driver stage may be biased using dynamically adjustable power supply voltages that are optionally reduced relative to that of the nominal power supply voltages. One or more of the master and slave driver stages may be a bootstrapping driver stage having a bootstrapping capacitor.

公开(公告)号：US20210043138A1

公开(公告)日：2021-02-11

申请号：US17080685

申请日：2020-10-26

Applicant: Apple Inc.

Inventor： Chin-Wei Lin ,  Shyuan Yang ,  Chuang Qian ,  Abbas Jamshidi Roudbari ,  Ting-Kuo Chang

IPC: G09G3/3225 ,  G09G3/3233

Abstract: A display may have an array of organic light-emitting diode display pixels operating at a low refresh rate. Each display pixel may have six thin-film transistors and one capacitor. One of the six transistors may serve as the drive transistor and may be compensated using the remaining five transistors and the capacitor. One or more on-bias stress operations may be applied before threshold voltage sampling to mitigate first frame dimming. Multiple anode reset and on-bias stress operations may be inserted during vertical blanking periods to reduce flicker and maintain balance and may also be inserted between successive data refreshes to improve first frame performance. Two different emission signals controlling each pixel may be toggled together using a pulse width modulation scheme to help provide darker black levels.

公开(公告)号：US10916198B2

公开(公告)日：2021-02-09

申请号：US16716911

申请日：2019-12-17

Applicant: Apple Inc.

Inventor： Chin-Wei Lin ,  Shinya Ono ,  Zino Lee ,  Yun Wang ,  Fan Gui

IPC: G09G3/3258 ,  H01L27/32 ,  H01L29/786

Abstract: A display pixel is provided that is operable to support hybrid compensation scheme having both in-pixel threshold voltage canceling and external threshold voltage compensation. The display may include multiple p-type silicon transistors with at least one n-type semiconducting-oxide transistor and one storage capacitor. An on-bias stress phase may be performed prior to a threshold voltage sampling and data programming phase to mitigate hysteresis and improve first frame response. In low refresh rate displays, a first additional on-bias stress operation can be performed separate from the threshold voltage sampling and data programming phase during a refresh frame and a second additional on-bias stress operation can be performed during a vertical blanking frame. The display pixel may be configured to receive an initialization voltage and an anode reset voltage, either of which can be dynamically tuned to match the stress of the first and second additional on-bias stress operations to minimize flicker.

公开(公告)号：US20210020109A1

公开(公告)日：2021-01-21

申请号：US17062786

申请日：2020-10-05

Applicant: Apple Inc.

Inventor： Chin-Wei Lin ,  Shinya Ono ,  Zino Lee ,  Yun Wang ,  Fan Gui

IPC: G09G3/3258 ,  H01L27/32 ,  H01L29/786

Abstract: A display pixel is provided that is operable to support hybrid compensation scheme having both in-pixel threshold voltage canceling and external threshold voltage compensation. The display may include multiple p-type silicon transistors with at least one n-type semiconducting-oxide transistor and one storage capacitor. An on-bias stress phase may be performed prior to a threshold voltage sampling and data programming phase to mitigate hysteresis and improve first frame response. In low refresh rate displays, a first additional on-bias stress operation can be performed separate from the threshold voltage sampling and data programming phase during a refresh frame and a second additional on-bias stress operation can be performed during a vertical blanking frame. The display pixel may be configured to receive an initialization voltage and an anode reset voltage, either of which can be dynamically tuned to match the stress of the first and second additional on-bias stress operations to minimize flicker.

公开(公告)号：US20200312234A1

公开(公告)日：2020-10-01

申请号：US16859272

申请日：2020-04-27

Applicant: Apple Inc.

Inventor： Chin-Wei Lin ,  Shinya Ono ,  Vasudha Gupta

IPC: G09G3/325 ,  G09G3/3258 ,  G09G3/3291 ,  G06F3/041 ,  G06F3/044 ,  H01L27/32 ,  G09G3/3233 ,  G09G3/3275

Abstract: A display may include an array of organic light-emitting diode display pixels having transistors characterized by threshold voltages subject to transistor variations. Compensation circuitry may be used to measure a transistor threshold voltage for a pixel. The threshold voltage may be sampled by controlling the pixel to sample the threshold voltage onto a capacitor at the pixel. The pixel may include at least one semiconducting-oxide transistor, silicon transistors, and a light-emitting diode. The diode may be coupled to a data line that can be used for both data loading and compensation sensing operations. Reset operations may be performed after data programming and before emission to reset the anode voltage for the diode.

公开(公告)号：US20200302853A1

公开(公告)日：2020-09-24

申请号：US16746288

申请日：2020-01-17

Applicant: Apple Inc.

Inventor： Shinya Ono ,  Chin-Wei Lin ,  Jie Won Ryu

IPC: G09G3/20

Abstract: The present disclosure relates to an electronic device that includes a display that has a plurality of scan lines. The display also includes a first data line that has a first number of pixels. The first data line forms a first number of crossovers with the plurality of scan lines. Additionally, the display includes a second data line that has a second number of pixels that is different than the first number of pixels. The second data line forms a second number of crossovers with the plurality of scan lines that is equal to the first number of crossovers.

公开(公告)号：US10576081B2

公开(公告)日：2020-03-03

申请号：US14986148

申请日：2015-12-31

Applicant: Apple Inc.

Inventor： Shih Chang Chang ,  Cheng Chen ,  Chin-Wei Lin ,  Donghee Nam ,  Meng-Huan Ho ,  Minhyuk Choi ,  Rui Liu

IPC: G09G3/3208 ,  A61K31/513 ,  G09G3/36

Abstract: Systems and electronic displays with improved contrast even under bright-light conditions are provided. Such an electronic display may include a self-emissive pixel (e.g., OLED or μ-LED) with a corresponding liquid crystal switchable retarder pixel. A liquid crystal layer of the switchable retarder pixel may be tuned to an “on” state or an “off” state. In the “on” state, the switchable retarder pixel may allow outside light that enters the pixel to reflect back out of the pixel. This may add to the amount of light that appears to be emitted from that pixel. In the “off” state, the switchable retarder pixel may block the outside light that enters the pixel from reflecting back out of the pixel. This may reduce the amount of light that appears to be emitted from that pixel. Selectively controlling the switchable retarder pixels may allow for increased contrast even under bright-light conditions.

公开(公告)号：US10559238B2

公开(公告)日：2020-02-11

申请号：US15698262

申请日：2017-09-07

Applicant: Apple Inc.

Inventor： Hung Sheng Lin ,  Shengkui Gao ,  Hyunwoo Nho ,  Chin-Wei Lin ,  Mohammad B Vahid Far ,  Jie Won Ryu ,  Kingsuk Brahma ,  Junhua Tan ,  Sun-II Chang ,  Shinya Ono ,  Jesse A Richmond ,  Yafei Bi ,  Derek K. Shaeffer

IPC: G09G3/00

Abstract: Systems and methods are provided for differential sensing (DS), difference-differential sensing (DDS), correlated double sampling (CDS), and/or programmable capacitor matching to reduce display panel sensing noise. An electronic device may include one or more processors and an electronic display. The one or more processors may generate image data and adjust the image data based at least in part on display sensing feedback. The electronic display may employ sensing circuitry that obtains the display sensing feedback at least in part by applying test data to a pixel of a column of an active area of the display and differentially senses an electrical value of the pixel in comparison to a reference signal from a different column. This reference signal may provide a common mode noise reference, which is removed by the differential sensing and thereby enhances a quality of the sensed electrical value of the pixel.

公开(公告)号：US10395600B2

公开(公告)日：2019-08-27

申请号：US15711706

申请日：2017-09-21

Applicant: Apple Inc.

Inventor： Chin-Wei Lin ,  Vasudha Gupta

IPC: G09G5/00 ,  G09G3/3266 ,  G11C19/18 ,  G11C19/28

Abstract: A display device may include a plurality of rows of pixels configured to display image data on a display and a first gate driver circuit. The first gate driver circuit may couple a first voltage source to a first node associated with a first gate of a first switch upon receipt of a start signal or a gate signal from another gate driver circuit and couple a first clock signal to a first gate line via the first switch after a first voltage of the first node exceeds a threshold. The threshold is associated with activating the first switch, such that the first gate line is configured to couple to a first row of the plurality of rows of pixels. The first gate driver circuit may then couple a second voltage source to the first node based on a second clock signal, such that the second voltage source discharges the first node.