Method of manufacturing a stacked capacitor having a fin-shaped storage
electrode on a dynamic random access memory cell
    193.
    发明授权
    Method of manufacturing a stacked capacitor having a fin-shaped storage electrode on a dynamic random access memory cell 失效
    制造在动态随机存取存储单元上具有鳍状存储电极的层叠电容器的方法

    公开(公告)号:US5807782A

    公开(公告)日:1998-09-15

    申请号:US533566

    申请日:1995-09-25

    CPC classification number: H01L27/10852 H01L27/10817 H01L28/87 H01L28/88

    Abstract: A method for manufacturing a stacked capacitor having fin-shaped electrodes with increased capacitance on a dynamic random access memory (DRAM) cell, was achieved. The invention eliminates the need for a silicon nitride etch stop layer, which is known to cause stress in the substrate and lead to defects. The capacitor bottom electrodes having fin shaped portions is fabricated by depositing a multilayer of alternate layers of silicon oxide and doped polysilicon on a partially completed DRAM device having FETs. After forming, with single masking step, the node contacts to the substrate in the multilayer and depositing another doped polysilicon layer, the polysilicon layers and oxide layer are patterned to form the electrodes. An important feature of this invention is that the patterned multilayer is etched to the silicon oxide layer over the bottom polysilicon layer and then the silicon oxide layer(s) are isotropically etched (e.g. in HF) to form the fin capacitor. The fin structure is then used as a mask to anisotropically etch the bottom polysilicon layer, and thereby complete and electrically isolate the bottom fin-shaped electrodes. The capacitor is completed by forming the inter-electrode dielectric and depositing a top electrode layer.

    Abstract translation: 实现了在动态随机存取存储器(DRAM)单元上制造具有增加电容的鳍状电极的堆叠电容器的方法。 本发明消除了氮化硅蚀刻停止层的需要,其已知会在衬底中引起应力并导致缺陷。 具有鳍形部分的电容器底部电极通过在具有FET的部分完成的DRAM器件上沉积多层氧化硅和掺杂多晶硅的交替层来制造。 在形成之后,通过单个掩模步骤,节点接触多层中的衬底并沉积另一个掺杂多晶硅层,对多晶硅层和氧化物层进行构图以形成电极。 本发明的一个重要特征是,图案化多层被蚀刻到底部多晶硅层上的氧化硅层上,然后氧化硅层被各向同性地蚀刻(例如在HF中)以形成散热片电容器。 然后将鳍结构用作掩模以各向异性蚀刻底部多晶硅层,从而完成并电隔离底部鳍状电极。 通过形成电极间电介质并沉积顶部电极层来完成电容器。

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