-
211.发明申请公开(公告)号：US20180191379A1
公开(公告)日：2018-07-05
申请号：US15907064
申请日：2018-02-27
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/1165 , H03M13/255 , H03M13/2792 , H03M13/616 , H03M13/6552 , H04L1/0041 , H04L1/0042 , H04L1/0057 , H04L1/0071 , H04L27/3422
Abstract: A modulator and a modulation method using a non-uniform 16-symbol signal constellation are disclosed. The modulator includes a memory and a processor. The memory receives a codeword corresponding to a low-density parity check (LDPC) code having a code rate of 4/15. The processor maps the codeword to 16 symbols of the non-uniform 16-symbol signal constellation on a 4-bit basis.
-
公开(公告)号：US20180109270A1
公开(公告)日：2018-04-19
申请号：US15842565
申请日：2017-12-14
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/2792 , H03M13/1102 , H03M13/1165 , H03M13/255 , H03M13/271 , H03M13/2778 , H03M13/616 , H03M13/6552 , H04L1/0041 , H04L1/0058 , H04L1/0071
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 16-symbol mapping.
-
公开(公告)号：US20180054654A1
公开(公告)日：2018-02-22
申请号：US15556973
申请日：2016-03-14
Inventor： Sung-Ik PARK , Jae-Young LEE , Sun-Hyoung KWON , Heung-Mook KIM
IPC: H04N21/61 , H04N21/2383 , H04H20/42 , H04L5/00 , H04L27/36
CPC classification number: H04N21/6112 , H04H20/426 , H04L5/0048 , H04L27/18 , H04L27/362 , H04L27/3854 , H04N21/2383 , H04W28/06
Abstract: An apparatus and method for broadcast signal frame using a bootstrap including a symbol for signaling a BICM mode and OFDM parameters of a preamble, together are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a time interleaver configured to generate a time-interleaved signal by performing interleaving on a BICM output signal; and a frame builder configured to generate a broadcast signal frame including a bootstrap and a preamble using the time-interleaved signal. In this case, the bootstrap includes a symbol for signaling a BICM mode and OFDM parameters of L1-Basic of the preamble, together.
-
214.发明申请公开(公告)号：US20180048425A1
公开(公告)日：2018-02-15
申请号：US15553687
申请日：2016-02-25
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM
CPC classification number: H03M13/2792 , H03M13/1148 , H03M13/1165 , H03M13/152 , H03M13/253 , H03M13/255 , H03M13/2778 , H03M13/2906 , H03M13/618 , H03M13/6362 , H04L1/0041 , H04L1/0058 , H04L1/0068 , H04L1/0071
Abstract: A parity puncturing apparatus and method for variable length signaling information are disclosed. A parity puncturing apparatus according to an embodiment of the present invention includes memory configured to provide a parity bit string for parity puncturing for the parity bits of an LDPC codeword whose length is 16200 and whose code rate is 3/15, and a processor configured to puncture a number of bits corresponding to a final puncturing size from the rear side of the parity bit string.
-
公开(公告)号：US20180013448A1
公开(公告)日：2018-01-11
申请号：US15703842
申请日：2017-09-13
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Bo-Mi LIM , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/2767 , H03M13/1105 , H03M13/1165 , H03M13/255 , H03M13/2778 , H03M13/2792 , H04L1/0041 , H04L1/0071
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 64-symbol mapping.
-
Patent Agency Ranking
216.发明申请公开(公告)号：US20170353588A1
公开(公告)日：2017-12-07
申请号：US15541604
申请日：2016-01-07
Inventor： Jae-Young LEE , Heung-Mook KIM , Sung-Ik PARK , Sun-Hyoung KWON
CPC classification number: H04L69/324 , H04H60/07 , H04L1/0041 , H04L1/005 , H04L1/0057 , H04L1/0058 , H04L1/007 , H04L1/0071 , H04L5/0007 , H04L5/0044 , H04L69/323 , Y02D70/168
Abstract: An apparatus and method for broadcast signal frame using layered division multiplexing are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal at different power levels; a power normalizer configured to reduce the power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing interleaving that is applied to both the core layer signal and the enhanced layer signal; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling time interleaver information shared by the core layer signal and the enhanced layer signal, using the time-interleaved signal.
-
217.发明申请公开(公告)号：US20170310343A1
公开(公告)日：2017-10-26
申请号：US15645924
申请日：2017-07-10
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/1165 , H03M13/255 , H03M13/2792 , H03M13/616 , H03M13/6552 , H04L1/0041 , H04L1/0042 , H04L1/0057 , H04L1/0071 , H04L27/3422
Abstract: A modulator and a modulation method using a non-uniform 16-symbol signal constellation are disclosed. The modulator includes a memory and a processor. The memory receives a codeword corresponding to a low-density parity check (LDPC) code having a code rate of 4/15. The processor maps the codeword to 16 symbols of the non-uniform 16-symbol signal constellation on a 4-bit basis.
-
218.发明申请公开(公告)号：US20170290007A1
公开(公告)日：2017-10-05
申请号：US15478057
申请日：2017-04-03
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Bo-Mi LIM , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H04L1/0042 , H04L1/0043 , H04L1/0052 , H04L1/0057 , H04L1/0071 , H04L1/0075 , H04L12/1877 , H04L12/189 , H04L2001/0093
Abstract: An apparatus and method for generating a broadcast signal frame for signaling a time interleaving mode are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal; a power normalizer configured to perform power-normalizing for reducing the power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing time interleaving after performing the power-normalizing; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling a time interleaving mode corresponding to the time interleaver for each of physical layer pipes (PLPs).
-
公开(公告)号：US20170272103A1
公开(公告)日：2017-09-21
申请号：US15612801
申请日：2017-06-02
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Bo-Mi LIM , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/2792 , H03M13/1165 , H03M13/255 , H03M13/2778 , H04L1/0057 , H04L1/0071 , H04L2001/0093
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 16-symbol mapping.
-
公开(公告)号：US20170093437A1
公开(公告)日：2017-03-30
申请号：US15372926
申请日：2016-12-08
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/2792 , H03M13/1165 , H03M13/1177 , H03M13/17 , H03M13/255 , H03M13/2778 , H04L1/0041 , H04L1/0057 , H04L1/0071 , H04L1/0076
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 3/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for quadrature phase shift keying (QPSK) modulation.
-
-
-
-
-
-
-
-
-
Search Results
228
records
(took 0.036 seconds)
