公开(公告)号：US10453498B2

公开(公告)日：2019-10-22

申请号：US15869558

申请日：2018-01-12

Applicant: Quanta Computer Inc.

Inventor： Hsin-Chih Kuo

IPC: H02M1/08 ,  G11C5/14 ,  G11C7/10 ,  G11C7/14 ,  G11C7/22 ,  H03K5/19 ,  H02M3/335 ,  H03K17/22 ,  H02M1/36 ,  H02M1/00 ,  H02M1/32

Abstract: A power reset circuit is provided. The power reset circuit has a first terminal coupled to a first power storage element and a second terminal coupled to a second power storage element and a load and includes a discharging control circuit and a switching control circuit. The discharging control circuit induces a short circuit between the second terminal and the ground terminal when a supply voltage at the second terminal is lower than a reset voltage to provide a first discharging path. The switching control circuit provides a conduction path between the first and second terminals when the supply voltage is higher than an end-of-discharging voltage lower than the reset voltage. During a period when the supply voltage is lower than the end-of-discharging voltage, the switching control circuit cuts off the conduction path and provides a second discharging path between the first terminal and the discharging control circuit.

公开(公告)号：US10447140B1

公开(公告)日：2019-10-15

申请号：US16105198

申请日：2018-08-20

Applicant: Quanta Computer Inc.

Inventor： Hsin-Chih Kuo

IPC: H03K17/00 ,  H02M1/08 ,  H03K17/687 ,  H02M3/04

Abstract: An enable circuit includes a first detection controller, a second detection controller, and an enable switch. The first detection controller has a first input terminal coupled to a first input terminal voltage and a first output terminal. The second detection controller has a second input terminal coupled to the first input terminal voltage and a second output terminal. The enable switch has a control terminal coupled to the second output terminal, a third input terminal coupled to a second input terminal voltage, and a third output terminal. When the first input terminal voltage is higher than the first setting voltage but lower than the second setting voltage, the enable circuit is coupled to ground by the second output terminal, thus the enable switch is turned on to output an enable signal from the third output terminal, wherein the enable signal is provided by a second input terminal voltage.

公开(公告)号：USD862465S1

公开(公告)日：2019-10-08

申请号：US29648481

申请日：2018-05-22

Applicant: Quanta Computer Inc.

Designer： Shiu-Yi Su ,  Shih-Yun Lee ,  Gwo-Chyuan Chen

公开(公告)号：US20190303315A1

公开(公告)日：2019-10-03

申请号：US16041065

申请日：2018-07-20

Applicant: QUANTA COMPUTER INC.

Inventor： Ching-Chih SHIH ,  Lien-Hsun CHEN ,  Chiao-Lun TSAI

IPC: G06F13/16 ,  G06F13/42

Abstract: A system and method for insuring efficiency of a serial link between a host server and a switch is disclosed. A fabric switch has upstream ports associated with a serial link. A fabric controller is coupled to the switch. A host server includes a BIOS and a management controller. The host server has ports coupled to the serial link ports via cables to form lanes of the serial link. A memory is accessible by the controller and the management controller. The management controller reads an expected speed and width of the serial link from the memory. The BIOS determines an actual speed and width of the serial link. The management controller sends an error message if the actual speed and width do not match the expected speed and width.

公开(公告)号：US10432479B2

公开(公告)日：2019-10-01

申请号：US15140259

申请日：2016-04-27

Applicant: Quanta Computer Inc.

Inventor： Yen-Ping Tung

IPC: G06F15/173 ,  H04L12/24 ,  H04L12/931

Abstract: Systems, methods, and computer-readable storage devices for reducing the amount of management ports (and associated cabling) for a top-of-rack server environment. Whereas other server management configurations have cabling connecting each node in multiple multi-node chassis in a server rack to a top-of-rack, systems configured as described herein designate a single node as a point of communication for the multi-node chassis. The designated node forwards communications for all nodes in the chassis to a chassis management controller, which acts as a distribution point for all communications within the multi-node chassis, with the benefit of only a single connection being required between the multi-node chassis and the top of rack switch.

公开(公告)号：US10423263B2

公开(公告)日：2019-09-24

申请号：US15962447

申请日：2018-04-25

Applicant: Quanta Computer Inc.

Inventor： Kun-Ho Lee ,  Chih-Min Chan

IPC: G06F3/00 ,  G06F3/041 ,  G06F1/16

Abstract: A portable electronic device is provided. The portable electronic device includes a display unit, an input unit and a hinge member. The hinge member is detachably connected to the display unit and pivotally connected to the input unit, and the hinge member and the display unit are rotatable relative to the input unit around a rotary axis. The display unit has at least a slot and the hinge member has at least a guide pin corresponding to the slot. The guide pin has a first slope structure and a vertical surface structure. The first slope structure and the vertical surface structure are arranged in a direction parallel to the rotary axis.

公开(公告)号：US20190286590A1

公开(公告)日：2019-09-19

申请号：US15921092

申请日：2018-03-14

Applicant: QUANTA COMPUTER INC.

Inventor： Chi-Tsun CHOU ,  Ying-Che CHANG ,  Yen-Tse CHANG ,  Wen-Hua LO

IPC: G06F13/362 ,  G06F13/42 ,  G06F1/28

Abstract: An example multi-node system that prevents multi-master issues on a common bus is disclosed. The system has a first node and a second node. A backplane is coupled to the first and second nodes via a system management bus. A complex programmable logic device is coupled to the system management bus. The complex programmable logic device includes hardware logic operable to arbitrate between bus commands from the first and second nodes.

公开(公告)号：USD859516S1

公开(公告)日：2019-09-10

申请号：US29637241

申请日：2018-02-15

Applicant: Quanta Computer Inc.

Designer： Hung-Tse Wang ,  Chang-Ta Miao ,  Gwo-Chyuan Chen ,  Yi-Chun Ma

公开(公告)号：USD858522S1

公开(公告)日：2019-09-03

申请号：US29655642

申请日：2018-07-05

Applicant: Quanta Computer Inc.

Designer： Jyun-Jie Chen ,  Shih-Yun Lee ,  Gwo-Chyuan Chen

公开(公告)号：US10405462B2

公开(公告)日：2019-09-03

申请号：US16048745

申请日：2018-07-30

Applicant: QUANTA COMPUTER INC.

Inventor： Chao-Jung Chen ,  Yi-Chieh Chen ,  Yueh-Chang Wu ,  Jhih-Bin Guan

IPC: H05K7/20 ,  H05K7/14

Abstract: A system and method to ensure the proper operation of a power supply unit in an electronic device. The electronic device has a chassis with a length and a width that includes one area having electronic components. A system fan is located in the chassis relative to the electronic components to generate air flow in the direction of the length of the chassis through the electronic components. A power supply unit is located in parallel to the system fan relative to the width of the chassis. The power supply unit includes an AC input, a DC output and an internal fan. A controller is operable to control the system fan to reduce the air flow when the power supply unit turns on AC power to the AC input, or wakes up from a cold redundant state and outputs DC power from the DC output.